Hello,
I'm troubleshooting a design using a PGA308. I have been able establish bidirectional communication but it appears that I'm not doing something correctly with the internal device setup.
For instance when attempting to set the output offset using either the course or fine offset registers the only outcome is that the offset moves either to V+ or GND.
Can you provide me with a set of register setup values based on my design?
Analog Connections:
Current RAM writes:
- Write SFTC Register – Command = 0x07, Data = 0x0050
- Write CFG2 Register – Command = 0x04, Data = 0x0C00
- Write ZDAC Register – Command = 0x00, Data = (fine offset unsigned 16 bit value)
- Write GDAC Register – Command = 0x01, Data = (fine gain unsigned 16 bit, 0.333=0x0000, 0.999=0xFFFF)
- Write CFG0 Register – Command = 0x02, Data = xxx1yyyyzzzzzzzz
Where: xxx = Final Gain Code (0x0=2, 0x1=2.4,…0x6=6)
yyyy=Front End Gain Code (0x0=4,…0xD=1600)
zzzzzzzz=Coarse Gain (2’s compliment, -63 to +63, 0x00=0, 0xff= -1, 0x80=-FS, 0x7f=+FS)
Scott
