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TLV2372: Input Bias Current/offset current

Luke Sun
Intellectual 1830 points
Part Number: TLV2372

Hi team,

The datasheet mentions that TLV2372's Input bias current/offset current is as below. But the test condition is VIC=VDD/2.

I want to understand when VIC is changed in 0~VDD level, will input bias current/offset current also vary in this range?  Or the max value will also change based on different VIC level?

THanks!

  • 0
    TI__Mastermind 30600 points
    Hi Luke,

    For some devices, there is a plot which shows the change in Ib and Ios vs common mode voltage but we haven't characterized that behavior for this device. Changing VIC will change the Ib and Ios voltage as well as the max value but it is difficult to say how much it will change because it is a topology and process based parameter.

    This is a CMOS device however and both Ib and Ios are low and caused by the leakage current of the input ESD diodes. Does your application have large input resistances or other large circuit resistances where you would be concerned about the impact of these offsets? Usually these offsets are not the dominant sources of offset in a CMOS amp.

    -Paul
  • 0 in reply to Paul Goedeke
    TI__Mastermind 30600 points
    Hi Luke,

    I wanted to add a little more detail to my reply. If you read this blog post from Bruce Trump, e2e.ti.com/.../i-need-high-input-impedance, you'll see that one way to get the input resistance of the device is to perform the sweep that you are asking about.

    Looking at the datasheet for the TLV2372, we see that RIN is 1000 gigaohms, which means that measuring the change in Ib is quite difficult to do and that the change is very small - the slope is 1pA/V. Therefore, as a rough estimate, if you move VIC up 1V, you'll see 1pA more of Ib.

    I hope that is clear. Please feel free to share your application details if changes in this value are of concern.
    -Paul