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LMV7235: Output flip

Part Number: LMV7235

Team,

My customer has the following comment and needs clarification.

LMV7235 data sheet section 8.3.1 states that "If one of the inputs goes above the positive common mode limit, the output will still maintain the correct logic level as long as the other input stays within the common mode range". Testing has revealed this to be true only if the input current to the pin is below approximately 0.35mA (room temp). If the pin current exceeds this threshold, the output flips to the wrong state. There is a /-10mA abs max input current constraint but, if confirmed, this additional functional constraint should be provided in the datasheet.

Regards,

Aaron

  • Hi Aaron,

    Thanks for reaching out to us. What voltages is the customer applying to the inputs of this device? One thing to keep in mind is that the abs max for this device is VCC+0.3 while the common mode range is VCC+0.1 at room temperature. The note in the datasheet says the output will maintain the correct logic level if one of the inputs goes above the positive common range, but the input must be below the abs max value also. The large input current of 0.35mA and above could mean that the input voltage applied is greater than or near the abs max value and causing the input ESD diode to conduct. This would lead to the incorrect output state you are describing.

    Regards,

    Jaskaran

  • Jaskaran,

    Thanks for the info. Here is something else the customer sent over to re-create the issue.

    LMV7235 Test:
    pin5 = 5.1V
    pin1 = pulled up to 5.1V with a 1K resistor
    pin2 = Ground
    pin3 = Connected to 1.7V through a 24.9K resistor
    pin4 = Vin through 4.99K resistor
    Set Vin = 5.0V, pin1 output should be LOW
    Increase Vin voltage until output flips high
    Vin should be approx. 8.3V when the output flips
    pin4 voltage should be approx. 6.6V when the output flips
    pin4 input current approx. (8.3-6.6)/4990 = 0.35mA when the output flips
  • Hi Aaron,

    This is expected behavior from the conditions the customer has sent over. With V+ at 5.1V, the common mode limit is VCC+0.1 or 5.2V and the abs max limit is VCC+0.3 or 5.4V. The customer is driving the device inputs with 6.6V and 8.3V, which are extremely over these limits and could be damaging the device. As mentioned in my last reply, the app note in the datasheet says the output will maintain the correct output logic level if one input passes the common mode limit but this does not apply if the inputs are above abs max. The device is not designed for these conditions and the behavior seen by the customer is expected when these limits are exceeded by this amount.

    Regards,
    Jaskaran