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INA181: Operation when REF=0

Part Number: INA181


Hi,

Set REF=0 and output only the positive part of the SIN wave current
I am thinking about circuits.
However, there is no output at all.

IG1 is an AC current source of ±0.5A(1App), 1kHz.
A 20mΩ resistor is connected between the INP and INN terminals and applied to the INA181A3 (Gain = ×100).
Set REF=0(GND).

21.81mV is output to the OUT terminal at this time. I do not expect this output.

I was expecting a 1kHz half-wave rectified waveform output with an amplitude of 1V (+0.5A × 20mΩ × 100) around REF (0V).
What is the cause (problem)?

Likewise, when REF=0.1V, the expected result is not output.
Most of the rising edge of the half-wave rectified waveform is not output.
Please check the attached document for details.

best regardsINA181A3 Q.pdf

  • Hello Cafain,

    The most likely reason for your observation is that the TINA model doesn't correctly represent the non-zero saturation recovery time of the INA181; in this case the delay seems to be too long. Below is a plot of what I measured on bench and you can see that the output approaches a half-wave rectified sinusoid except for the sharp transitions that occur when the device re-enters its linear mode of operation.

    In general, our SPICE macro-models are accurate under linear operating conditions and not under saturation. The reason comes down to complexity vs. speed whereby we focus on accurately modeling device behaviors only under the most common input-output conditions for simplicity and ease of convergence. I hope this helps.

    Best Regards,

    Harsha

  • HI, Harsha-san

    Thank you for checking by the bench test.
    I understood that the Spice model was not made accurately.

    It is judged that the output of INA181 is Ch2 with the waveform of the oscilloscope.
    Even at the bench tensor, part of the rising waveform is not output in the same way, and a steep rise occurs
    It is output, please tell me the reason for this.

    When REF=0 or 0.1V, what causes the output not to become a half wave rectified sine wave around REF?
    What is the cause of "sharp transitions that occur when the device re-enters its linear mode of operation"?

    best regards

  • Hi Cafain,

    It is judged that the output of INA181 is Ch2 with the waveform of the oscilloscope.

    Correct

    Even at the bench tensor, part of the rising waveform is not output in the same way, and a steep rise occurs
    It is output, please tell me the reason for this.

    As mentioned previously, the reason is the amplifier's non-zero saturation recovery time. Driving the differential input to a large negative value (i.e. Vsense < -VREF/Gain - VOS) will cause the amplifier output to saturate at its minimum value (slightly above GND). When the input becomes positive again, the amplifier output does not immediately become linear and start tracking the input. There is a delay > 0 seconds. The sharp rise is because the input voltage (at 1kHz frequency) is changing very quickly during this delay time. As a result the difference between the amplifier inputs becomes large and the output slews generating the "steep rise". Observe what happens when the input frequency is decreased (to 100Hz):


    In this case the input is changing 10x slower. As a result the magnitude of the output change during the saturation recovery time is much smaller and the amplifier is able to quickly correct it (through negative feedback action) without slewing.

    When REF=0 or 0.1V, what causes the output not to become a half wave rectified sine wave around REF?
    There was a small error in my technique the last time around, so it may have seemed as though the output was clamping to a voltage below GND (see new plot below). In reality however, the output clamping voltage is determined by the output swing to GND, which according to the INA181 datasheet is typically <= (GND + 500uV). It is not possible to resolve 500uV on a 100mV full-scale range that is being used for CH2, so for all practical purposes, the output voltage clamps to GND (and not to REF).


  • Harsha-san

    What I understood in this question is the following two points.
    · Spice-Model problem
    · Problem of "Reason is the amplifier's non-zero saturation recovery time"

    With regard to recovery time, we could understand that if the frequency is low, the output can be output as it is delayed.
    Thank you for your prompt and detailed answers.

    best regards

    cafain