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LT1013: LT1013 or OPA196 for Input Scaling Network of ADC?

Armin L.
Intellectual 480 points
Part Number: LT1013
Other Parts Discussed in Thread: OPA196,

Hello! ;)

I want to scale an analog voltage (-10 ... +10 V) to fit into the range of an ADC (0 ... 3.3 V). For this purpose I want to buffer the input voltage with a unit gain buffer and after that I either...

1.) ... use a resistive divider with an additional branch to a higher voltage level (see picture below), e.g. the upper OpAmp supply rail instead of 3.3 V, and buffer the output of the divider (ADCin) with a unity-gain buffer again, ...

2.) ... or I use a summing amplifier to interface the ADC, like in the picture below (the above-mentioned upper OpAmp supply rail would be used as v_p to bias the non-inverting input).

First of all: Which of the two approaches seems better to you? The input will be rather a low-frequency, DC-like signal. Maybe some step changes will occur. I want to supply all OpAmps with -15 V and +15 V.
A friend suggested to use the LT1013 as buffers. But I also found the OPA196 on the internet, which seems to have better specifications than the LT1013.
Do you know the input bandwidth of the LT1013? I cannot find anything about this in the LT1013 datasheet.
Which of those amplifiers would you suggest as unity-gain buffers and which as OpAmp for the above-mentioned summing amplifier?

Best regards!

  • 0
    Guru 140200 points
    Hi Armin,

    I would use the first methode. I have used it once with the ATMEGA328. But I would change the scaling. You should not use the full input range of ADC but stay a bit from the rails. Or by other words, -10V should give 0.1V and +10V should give 3.2V. How much you should stay away from the rails depends on resistor tolerances and ADC offset and gain specifications. Also, for V1 a voltage reference is necessary. The same as the ADC uses?

    Kai
  • 0 in reply to kai klaas69
    Intellectual 480 points
    Thanks for the answer! I already changed the resistor values so that I stay away by 0.05 V from both boundaries. Should I increase the gap to 0.1 V (as you suggested)? I want to purchase some resistors with 0.1 % tolerance to limit this source of error.
    For V1 I wanted to use the upper OpAmp supply rail of +15 V. This voltage is provided by a voltage regulator. I want to support the node from V1 to R3 by placing some bypass caps to GND there, to reduce noise.
  • 0
    TI__Guru* 93105 points

    Hi Armin,

    The 3-resistor network is one approach for attaining the necessary attenuation and offset to convert a +/10 V input to a 0 to +3 V ADC input. But just how closely the converter comes to achieving its full resolution depends on the the load it presents to the network. The input of an ADC, unless it contains an internal buffer, presents a dynamic load impedance to the network. There are portions of the conversion cycle where the transient input current can be momentarily high and that can create issues with the 3-resistor netwrok approach. If the converter resolution is low, and it presents a high impedance load to the network the performance may be satifactory.

    We find that for higher resolution converters that best performance is achieved with an op amp buffer and an RC interface, the latter between the op amp and the converter input. This combination can be selected to supply the required transient current such that the full resolution of the converter is achieved.

    A good deal of information has been developed by TI on the subject of driving converters. The following TI Precision Lab on the subject might be useful to you:

    https://training.ti.com/ti-precision-labs-adcs

    The OPA196 is a modern, high performance operational amplifier. It proides dc precision with the ac performances needed to drive converters.

    Regards, Thomas

    Preicison Amplifiers Applications Engineering

  • 0 in reply to Thomas Kuehl
    Intellectual 480 points

    Thanks for the answer! I already accounted for buffers, sorry that I did not include them in the schematics. I will use a unity-gain buffer for the input as well as one for the output.

    I do not quite get the purpose of the RC network after the input buffer: An RC low-pass would decrease the dynamic performance of the ADC driver, right?

  • 0 in reply to Armin L.
    Guru 140200 points
    Hi Armin,

    in my application with the ATMEGA328 I had R1=22k, R2=11k +3k and R3=330k with V1=4.096V (MCP1541). The MCP1541 also powered the reference voltage input of µC. So, with a 0...10V input signal I stayed away about 100mV from 0V and about 200mV from 4.096V. Across R2 I had a 100n/X7R cap. With this voltage divider I could directly feed the ADC input of ATMEGA328.

    I don't know the ADC you use. So, as Thomas already mentioned, you might need a unity-gain buffer in front of the ADC input. Look into the datasheet what the ADC needs at its input.

    In your application I wouldn't use the +15V OPAmp supply as V1, provided you need high precision. Only a voltage reference would be stable enough. Remember that the drift of V1 directly affects the accuracy of your ADC reading.

    There's still another problem: Take care that you don't damage the ADC input, if you power the unity-gain buffer with a high supply voltage. It would be ideal if you could supply the unity-gain buffer with the supply voltage of ADC. And this supply voltage should also power the voltage reference.

    Kai
  • 0 in reply to kai klaas69
    Guru 140200 points
    "I do not quite get the purpose of the RC network after the input buffer: An RC low-pass would decrease the dynamic performance of the ADC driver, right?"

    The C delivers the fast currrent spikes the internal ADC switchings draw at its input and the R decouples the unity-gain buffer from the capacitive load. But it depends on actual ADC whether such a RC circuit is necessary at all.

    Kai
  • 0 in reply to Armin L.
    TI__Genius 11135 points
    Hi Armin
    We haven't heard back from you, so we assume you were able to resolve your issue. If not, just post below (or create a new thread if this one is locked due to time out.)
    Thanks
    Dennis