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INA181: reverse polarity protection?

Part Number: INA181
Other Parts Discussed in Thread: INA197, INA190

Hi there, I'm considering the INA181 to perform bidirectional current measurements because of it's accuracy and simplicity. I'm measuring voltages across a 33mohm shunt and the common voltage will typically be around 8-16V. The device datasheet suggests transient protection consisting of a TVS and back-to-back diodes, however I was wondering if there was a simple way to protect the device from reverse polarisation as well.

The common mode input range is only -0.3 to 26V, so I would need to limit the voltage on the input pins to -0.3V somehow. This seems very difficult considering the requirement for a low impedance in the sense lines (<10ohm). The current would be too high for any diode to handle.

Am I missing a simple way to protect the device against reverse polarity on the input pins or will I not be able to use this device? If not, can you suggest another device with comparable accuracy? We've used the INA197 before, but accuracy is not as good (3%).

Here's a rough schematic of what our circuit looks like. The LM5050 is used as reverse polarity protection for INPUT 1, for INPUT / OUTPUT 2 we can't use that trick as it's an input as well as an output. There is reverse polarity protection to the internal system rail for both inputs via simple diode OR-ing, but there is nothing stopping the voltage at INPUT 2 getting below GND. Ideally the current monitor would be able to handle this (considered as a fault condition, so it doesn't have to be operational).

  • Hello Sammy, we are looking into this and will respond soon.


    Thank you,
    Manuel Chavez
  • Hello Sammy,

    Thanks for looking into our product portfolio. So it seems you are limited by the fact the INPUT/OUTPUT 2 node can also be an output and thus you cannot put a power FET or diode in-series here.

    One product that you can definitely look into is the INA190. This was recently released and you can order samples. I recommend this device because it is very similar to the INA181, but has a much lower input bias current (IB = 10nA max) and low input offset current (Ios = 15nA max). This is 3 orders of magnitude smaller than the IB of INA181 and most other current sense amplifiers.

    The lower IB allows you to use larger input resistors (1kΩ input resistors should be fine) without losing much accuracy. You can experiment with our TINA model (available online) to get an idea of this error. The model has programmed into the behavior of IB+ and IB- as the input voltage across Rsense varies, which is not currently included in the datasheet, but will be in a few months once it is fully released.

    With the larger resistors you can implement smaller (less powerful) clamping diodes off your inputs because the 1kΩ resistor will limit the current. This limited current also provides a benefit for the power supply that has to supply the diode current when clamping.

    Here is a previous post where I outline some common clamping methods (not with INA190) and provide links to relevant educational material, but I think you already have considered most of this.
    e2e.ti.com/.../3610.dealing-with-device-protection-when-you-cant-exceed-0-3v
    e2e.ti.com/.../2419912
    www.ti.com/.../slva139.pdf

    Hope this helps.

    Best,
    Peter Iliya
    Current Sensing Applications

  • Hi Peter,

    Thanks for the info. The INA190 does look interesting. Using 1k resistors and PMEG3020 diodes we could keep the common mode above -0.3V without drawing too much current. It's mainly the <10 ohm requirement of the INA181 that makes it difficult to protect.

    I have tried the TINA simulation as you suggested and it looks fine accuracy wise with a 15m ohm shunt and 1k resistors. I tested with the A2 version (50V/V).

    We're powering our ADC's using a 3V3 rail. Is it acceptable to use a voltage divider (1k/1k) to generate the midspan? I couldn't really find any specs regarding the REF pin input impedance. Using a voltage divider seems to work okay in the simulation.

    What is the impact of the product status (preproduction) on the availability? We'd need about 40 pieces for a proto run ASAP. Then another 200 pieces at the end of Q3. Is this possible or do you suggest using a different product in this case? I see the TI store has stock, but it's limited to 25pcs.

    Kind regards,

    Sammy

  • Hi Sammy,

    you wrote:

    "We're powering our ADC's using a 3V3 rail. Is it acceptable to use a voltage divider (1k/1k) to generate the midspan? I couldn't really find any specs regarding the REF pin input impedance. Using a voltage divider seems to work okay in the simulation."

    Figure 45 of datasheet of INA181 shows how to do this: If you take a voltage divider then you must buffer it with a OPAmp in order to minimize the source impedance seen from the REF pin to GND. Directly connecting a voltage divider to the REF pin would ruin the symmetry of input circuitry of chip and all the common mode rejection would be lost.

    Kai
  • Hey Sammy,

    The sampling for preproduction devices is limited to 25 pieces. The device should go into production around the end of Q3 in which case sampling 200 devices is perfectly normal.
     
    You can certainly use a resistor divider to generate a mid-supply rail. Ideally, you would use an op-amp to buffer (as Kai as suggested) this rail so you won't present a source impedance to the REF pin. This layout is done on the INA190 evaluation module (EVM), which is also available online if you want to perform testing with this.


     
    Without the op amp buffer you will generate two errors when loading down the reference pin: gain error and CMRR error. CMRR is at its lowest when internal matched resistors (for internal differential amplifier) are matched very well. Introducing an impedance at REF pin changes the effective feedback resistance for internal non-inverting branch. A worse CMRR means as the common-mode voltage (8-16V) changes, the input offset voltage (at IN+ and IN-) will change more than specified.

    Gain error is really a differential error. So we might spec max gain error at 0.3% for VOUT range of 100mV to Vs-100mV, but this would easily increase with a REF impedance.

    Anyway, there are ways to circumvent these errors. If your ADC is a differential input, you could tie INA190 REF pin to input of ADC. This ensures you are only measuring differential signals. Then you could perform a one-point calibration to remove the initial increased offset and/or a two-point calibration to calibrate out the gain error. This video explains this from viewpoint of ADC design:
    training.ti.com/ti-precision-labs-adcs-offset-and-gain-calibration

    Sincerely,
    Peter Iliya
    Current Sensing Applications