OPA847

Matthew,

It is possible that a feedback loop is being created through the common power supply connections of the three OPA847 stages and there is inadequate power supply rejection (PSR) to these high frequency signals. In this cascaded high gain configuration, small signals generated on the power supply due to the second and third stages' swinging outputs can be fed back into the inputs of earlier stages due to inadequate PSRR and create positive feedback/oscillations with the high circuit gain. This can be remedied by using inductors/beads to suppress any signals being fed back to earlier stages through the power supply. For example, the third stage OPA847 can be supplied directly from the power supplies, but the preceding stages should be connected to these same power supplies through series inductors or beads.

I've shown 100nH inductors here between the different OPA847 supply pins in the above example.

Kristoffer,

This helped a little. I also found that there was too much capacitance on the output pin of the second stage. I cut the ground plane back from that pin and also put the output 50 ohm resistor right on the pin. It now operates properly, but there is a DC offset of about +400mV on the output. I have the inputs current balanced, is there another property that affects output offset?

Matt,

Small input voltage offsets will be amplified by the gain to the output. What is the gain in each of the stages in your circuit? Can you measure the output offset of the initial transimpedance stage?

The input offset bias current is listed as +/-0.1uA at 25C and higher over temperature (p.3 of the datasheet). This offset current means that even if you have perfectly matched effective resistances at these two inputs to cancel the bias currents, there can still be an offset current that will run through the resistance and create an offset voltage at the input. This offset voltage will then be amplified by signal gain to the output.

For example, if there is an offset of 0.1uA and an effective resistance of 10kohm at the non-inverting/inverting pin, this will result in an offset of 1mV. If the circuit has a gain of 30V/V, that means 30mV at the output. Add to this the separately specified input offset voltage, which will also be amplified by the signal gain, and the output offset can get higher. In a chain of cascaded op amps, each amp in the chain will have its own offset due to input current offset and input offset voltage which will be amplified through the amplifier gain and subsequent stages to the output.

You may need to implement an offset adjustment circuit as shown on p. 18 of the datasheet and discussed in the section labeled "DC Accuracy and Offset Control." Or if the signal is going into an ADC, this offset can be calibrated out in your software.

Please contact me directly at k.flores@ti.com if you would like to share any specifics that you do not want to post here.