Hello Tetsuro,
The 1250 corresponds to the input impedance of the bias circuitry on the front end of the INA181. From the impedance between the input pins to a shared virtual ground we can derive equation 5 in section 9.1.3 of the datasheet. Any filter resistor in series with this input impedance to the virtual ground attenuates the input value before it reaches the INA181 gain stage. Due to the virtual ground RINT is in parallel with the 1250 (RINT || 1250). The gain or attenuation of a voltage divider can be expressed as Vout/Vin=R2/R1+R2. In this case R2= RINT || 1250 and R1 = Rf. Through some simplification we then arrive at equation 5.
Admittedly the name “gain error factor” can be a bit misleading. An alternative way to look at it is as the percent of the input that is subject to the ideal gain. Without the filter resistance, the voltage divider is not formed and thus the “gain error factor” = 1, meaning 100% of the input signal reaches the intended gain stage. However, if there is a filter resistance, then a signal of reduced magnitude will reach the original intended gain stage. The difference between the percent of the full scale signal and reduced signal corresponds to the gain error as seen in equation 6.
