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HI Sannath,
- If possible, use a symmetrical layout at the Vin1 (pin 4) and Vin2 (pin 5) differential input path. Place the differential C88 capacitor across pin 4 and pin5 as close as possible to the pins of the device. Using a symmetrical path on the positive and negative differential path will yield to better match in the impedance and provide better common-mode noise rejection.
- In possible, for better results, we recommend using a dedicated solid plane ground layer underneath the PGA309 device and all the sensitive analog devices; this will allow for lower noise and more stable measurements.
A suggestion, add a 100pF bypass capacitor in close proximity to the REFIN/REFOUT pin.
Attached is a pdf file showing general layout recommendations that you may find helpful.
Thank you and Best Regards,
Luis