Hello TI,
I am developing a circuit where a differential voltage is converted to single-ended, rectified, and then sampled by a peak detector to be compared against a threshold voltage. The first iteration used the classic textbook peak detector and it worked as expected. The issue concerns the diode drop which ruins the accuracy of the circuit so I put the diode in a feedback loop of an OPA227.
The problem is that the voltage level droops significantly across the sampling cap if the voltage is >2V or more. Ideally there is no path for the capacitor to discharge - the inverting input is high impedance, the input bias current is vanishingly low, and the leakage current of the 1N4184 is also very low when reverse biased.
One thing I do notice is that there is a relatively large current flowing, ~1ma, into the inverting input when the output voltage at the OPA227 is in negative saturation. Since the input is sinusoidal the inverting input is held at the voltage level on the cap while the voltage on the non-inverting input is cycling between 0V and the peak voltage causing a large differential voltage at the inputs.
I don't think this in itself is the problem, but the OPA227 is not a rail to rail input op-amp. So if I am outside of the input common mode range should I expect a "large" current to flow into the inputs - inevitably discharging the sampling cap? I am still within the rails so the ESD diodes should not be conducting.
I used the THS4281 and there is no significant droop. I also tried the OPA627 (not rail to rail like the OPA227), yet this works similar to the THS4281.
Is this an issue with the model or is this expected real life silicon behavior?
Thanks.
-Ken
