Hello
Relatively new to signal chain analog circuit design. Could anyone point me to a reference for determining the power dissipation of the INA3221? There isn't much in way of design procedure in the data sheet.
Thanks
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Hello
Relatively new to signal chain analog circuit design. Could anyone point me to a reference for determining the power dissipation of the INA3221? There isn't much in way of design procedure in the data sheet.
Thanks
Hello Chuck,
Thanks for considering to use Texas Instruments. So I would just like to clarify, you are wanting to calculate the power dissipated within the INA3221 and are not interested in how to read the power measurement obtained by the INA3221, right? For calculating the INA3221's power consumption you would need to know the supply voltage, common mode voltage, and I2C clock frequency. Based upon the the clock frequency you can get the typical quiescent current seen at room temperature from figure 17 of the datasheet. From there you can then use the slope from figure 15 of the datasheet to adjust this value according to your expected ambient operating temperature. Then you would multiply this quiescent current by your supply voltage. That would be one component of the power dissipated, however you still need to get the component corresponding to the input bias current. From figure 12, you can determine the typical input bias current you would expect at IN+ and IN- for your devices common mode. You multiple the common mode voltage by the input bias current for both IN+ and IN-. You then sum these products with the supply and quiescent current product to get the total power dissipated.