LMH6629: Correct design of a photodiode-TIA setup

Hello Ben,

1) You may want to use a part other than the LMH6629 in your application. The reason you are seeing better results when adding 10MEG to the non-inverting input is because you are cancelling out your bias current which exceeds your 5nA input greatly. Even if you are able to do this effectively on a real board, the offset current also dominates your input current. Note that the combination of 10MEG at the non-inverting input along with your bias current will also cause you to exceed your common-mode input range.

You will want to use a FET device which will have lower bias current specs.

2) It doesn't make much of a difference because of the the DC blocking capacitor you have at the output (C3). You will still need to take the output range specs of the amplifier into consideration, however. In terms of DC, your goal should be to correctly bias your photodiode, in this case you are applying 2.5V at both sides of the photodiode. One way to do this is to apply the positive supply to the cathode of the amplifier, and applying a voltage at the non-inverting so that you get the biasing across the photodiode that you would need. (see the transimpedance amplifier in the first page of the LMH6629 datasheet).

3) You are using a part with a GBWP way above what is needed for a 1.25 kHz signal. Note that the "gain" in GBWP is not your transimpedance gain but the noise gain of the amplifier. Feedback capacitance is usually added to shape this noise gain so that the device remains stable with the capacitance of the photodiode (Look at page 3 of the this document)

In summary, I think you should switch to a FET device with a much lower bandwidth. I will move this thread to a colleague that can help you find a more suitable part for your circuit. Please let me know if you have any questions.

Best,

Hasan Babiker 

Hey Benjamin, 

Yes, LMH6629 is way too fast for your needs and yes a FET or CMOS input device will help a lot for bias current issues, 

HEre is a design using the OPA725 - I left this as +/-5V but can adjust it to single supply, The max flat BW you can get is about 70kHz with a 20Mohm R. I chose that because the feedback C solves to about 0.18pF which is about what the parasitic C is on an SMD thick film R. You can add more there if you want and just bandlimit more, You also cannot drive out to a Cload, need that 100ohm series to isolate that. 

This simulates surprisingly low input spot current noise, 

Transimpedance design (with some very useful simplifications) is covered here, 

8081.Transimpedance design flow using high speed op amps.pptx

You are going to have a lot of output noise, you may want to consider a narrowband filter with some more gain following this stage, 

Here is the file for this, 

OPA725 high Zt stageTSC.TSC

I took this a little further, adding a 1.25kHz DABP filter following the Zt stage, it will help your SNR but add complexity. Still staying with +/-5V CMOS op amps there, OPA2743. You can adjust this to single 5V with these parts, or use different parts. 

Original Zt is not bandlimited so its SNR just keeps going down with it wide integrated noise - this SNR is based on a 20mVpp output, 

right around 1.25kHz, about 50dB SNR, 

Here is a DABP filter design for 1.25kHz with a Q=10. I got a gain of 1 here, expected 2 but anyway, 

And then placing this after the transimpedance stage removing those shunt elements to ground, here is the overall gain, 

And here is the final SNR at the output of the DABP filter stage, a little bit better at 1.25kHz at 54dB, but then stays flatter as the broadband noise is filtered off, 

 here is this two stage file, 

OPA725 high Zt stage with DABP filter.TSC