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INA240-Q1: Gain Error vs. Vs shift

Part Number: INA240-Q1
Other Parts Discussed in Thread: INA240

Hi team,

With customer's system condition, Vs (4.5V)  may shift down to 4V over temperature.

Customer concern's whether Gain error gets increased due to this Vs shift.

Can I think Gain Error due to Vs shift is negligible?

 Best regards,

  • Hi Fujihara-san,

    The situation you described is guaranteed by this datasheet spec (psrr):

    A 0.5V supply shift results in a max 5uV input referred offset voltage. Practically, I would say it is negligible for most, if not all current sensing applications.

    Regards, Guang

  • Guang-san,

    Thanks a lot for your prompt support!

    Sorry for my lack of explanation about customer's use case.

    Customer plans to put NMOS + diode in Vs supply as buck-to-buck protection, and estimates VF shift of diode as 0.5V over temperature.

    So shift occurs gradually according to ambient temperature, it looks almost constant for a short period of time.

    In this case, can we think Gain Error is much more small?

    Best regards,

    Nobuo

  • Hi Nobuo,

    the gain is entirely determined by the resistors of internal differential amplifier. The supply voltage should not have any influence on the gain, provided the output of INA240 does not go into saturation (GND + 50mV <= VOUT <= VS - 200mV).

    Kai




  • Hi Fujihara-san,

    Kai is correct in that the decrease (variation in general) in supply does not contribute to gain error.

    Like mentioned in my previous post, it does contribute to the total error through an additional offset (for example, Max 5uV with given numbers).

    However this additional offset is independent of input (or output) voltage level, therefore it is has no bearing on gain and gain error.

    This will be true over temperature, if PSRR is constant. In reality, it probably is very close such that the temperature effect can be neglected. 

    Regards, Guang