PGA308： Software Lock Mode

Hi,

The flow diagram for the software lock mode is shown on Figure 5-14, page 73 of  the PGA309 User Guide, where the software lock mode is started at power-up by communicating on One-wire before the One-Wire Time out. 

Please point me to what mode of operation or what section of the user guide (or documentation) you are referring to when you ask if the device is performing the loop processing periodically.

Thank you and Regards,

Luis

Hi,

I referred to "sbou069B-June2009 Figure 5-14. Software Lock Mode"

Under what conditions does this loop occur?

Software Lock Mode.docx

Hi,

In order to start the Software Lock Mode, the user essentially writes the SFTC register [D6:D4] =101 at power up before the One-wire time out lapses.

In this mode of operation the one-wire communication is enabled, and all time-outs are disabled.  The checksum check is disabled and the user is allowed to write the RAM registers, (or load one of the OTP User Bank's if desired, by writing SFTC [D2:D0] to select one of the seven different OTP bank configurations)

Essentially the PGA308 state machine is locked in this mode, where the microcontroller controls the PGA308 RAM configuration settings and changes the PGA308 configuration settings through the microcontroller UART as desired. This configuration is used in configurations where the 1-wire connection is independent from VOUT.  Virtual Software lock mode is used for three terminal modules (1W connected to VOUT)

Thank you and Regards, 

Luis

Hi,

If I don't change the PGA308 RAM configuration settings via the microcontroller UART, will the originally configured RAM configuration settings be taken over even if the RAM configuration settings are changed due to external noise?

Thank you and Regards, 

Hi,

Yes, when using the Software Lock Mode, the 1W interface is always active, disabling all One-Wire timeouts...This mode of operation is used in applications where the microcontroller UART interface where the microcontroller will be in direct control of the PGA308 RAM settings on a flexible acquisition system, where the microcontroller may be used in close proximity to the PGA308. 

If the device is remotely connected to the microcontroller in a noisy industrial environment, there may be a chance that periodic noise could couple on the One-Wire interface,  and this could be potentially interpreted as a valid communication.  In this case, please consider using the 1W Circuit EMI/RFI filtering shown on figure 5-6, p.63 of the PGA308 User Guide to mitigate this risk, and consider adding shielding in the One-Wire connection. You could also consider implementing a routine on the microcontroller that periodically reads and verifies the correct RAM register settings.  Alternatively, you could choose to use one of the stand-alone modes of operation, where 1W interface is disabled after a time out, and the device is programmed by the OTP settings.

Thank you and Regards,

Luis