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AMC1311: Isolation Barrier Requirements

Part Number: AMC1311

Greetings. I am working on a PCB layout design featuring an AMC1311 isolated amplifier. Sheet 23 (figure 56) of the datasheet shows a recommended layout pattern for the amplifier. This image states that the area under the device is "to be kept free of conductive materials". Since this device is rated for 5kV of isolation, I can see why one would require such a large isolation barrier. My question is, for designs which do not require such high isolation levels, is it necessary to maintain the isolation barrier to the same dimension?

For example, my design requires something more in the range of 500V of isolation, rather than 5kV. Can I get away with extending my traces/planes under the AMC1311 (assuming I don't violate the required IPC clearance for the given voltage) or is there some other reason why the AMC1311 requires or expects the area beneath it to be conductor-free?

Hopefully my question makes sense.

Thanks!

  • Hi Chuck,

    Welcome to our e2e forum!  For proper operation of the AMC1311, there is nothing in particular about the device that requires the gap under the chip.  As you noted, the 5kV rating needs the spacing shown in the datasheet.  If your end equipment specifications don't require 8mm, you can adjust the gap as needed.