TLV3604EVM: Going from analogue serial to computer/USB HD via Ethernet or USB

Shaun

Using the TLV3604 to translate to LVDS is a good use case for the comparator, but I am not able to answer questions regarding TSW14DL3200.

I will forward your question to the appropriate forum for support on TSW14DL3200.

Chuck

Shaun,

You could use this interface to receive LVDS data into the FPGA on the TSW14DL3200 as long as the two FMC have common LVDS trace pin outs. You then could send the data out of the TSW14DL3200 using the FPGA to  USB 3.0 interface. Not sure if this is what you want but it could be done. Not sure why you would want to target such an expensive platform. What do you mean by "USB can send data like this"?

Regards,

Jim

Chuck/Jim,

I have one 500 Mbit/s serial OOK analogue signal with no clock, it is a simplex link. I want to put this via the comparator to get a digital signal. I then have to store this somehow for further offline analysis. I could go with asynch serial comm protocol "The start signal prepares the receiver for arrival of data and the stop signal resets its state to enable triggering of a new sequence." or ideally I can press record on the receiver when I press send on the transmitter as this is a prototype with a short time to demonstration so looking for reduced complexity. So looking for the receiver to simply record and route data to be saved.

I was thinking that the FPGA could sample this signal and translate it to USB 3.0 to be saved on USB hard drive as a binary file. What I mean by "can USB send data like this " is can The FPGA sample a 500 Mbit/s fast enough and can it route the sampled 1 or 0 to the USB HD in a binary file to be saved without communication in both directions. I can then further analyse the binary file later.

"Not sure why you would want to target such an expensive platform", I'm a novice and looking for a solution to go from the SMA output of the comparator at 500 Mbit/s to store the 1 and 0s on a USB HD, if you can see an easy inexpensive solution that would be great.

So does my application of connecting the ouput of the comparator to the FPGA with only one serial signal at 500 Mbit/s in lVDS logic level, sampling it fast enough and saving it to the USB HD sound feasible in your opinions?

Thanks in advance,

Shaun

Hi Jim,

If the analogue signal goes via the TLV3604EVM, which outputs LVDS, I thought this acted as a 1 bit resolution ADC and I could then use the SMA to FMC adapter in my first post to connect to the TSW14DL3200 which would then sample the 500 Mbit/s LVDS at 1 Gsps (Is this achievable?) and route this to a USB HD. So I didn't initial envision using ADC12DL3200EVM. Is there a reason using the ADC12DL3200EVM is better than my original proposal?

Cheers,

Shaun

Thanks Jim,

Why is that the only one that works with the FPGA platform? Is it to do with the FMC connector?

Cheers,

Shaun