TAS5731 I2C address, This might help others..

Hi, Ibrahim,

Sorry our documentation is not more clear on that...

Thanks for documenting it for others to benefit!

-d2

Hi Don,

We have a very strange problem, and urgently need to some help to deliver the project to the client... Thanks in advance :)

so, here is the problem: We feed the TAS5731 with I2S data, but nomater hat we do, the outputs are all 50% PWM. So naturally, this does not emmit any sound.

We have tried almost every possible startup and initialisation sequence, but we always get the same result.

We don't use MCLK, e let the device autogenerate its clock as described in the datasheet.

Even if there is something wrong with out I2S format, shouldn't we notice at least some variation in the output duty cyle..?

We constantly read the 0x2 register to check for errors, and always get 0x0 (no errors)

Here is out init code:

DBG_PrintStr("TAS5731: Start init");
DelayMs(150);

//Do the ~RESET low pulse
PORTSetPinsDigitalOut(TAS5731_PDN_PORT, TAS5731_PDN_PIN_MASK);
PORTSetPinsDigitalOut(TAS5731_RESET_PORT, TAS5731_RESET_PIN_MASK);
PORTClearBits(TAS5731_RESET_PORT, TAS5731_RESET_PIN_MASK);
PORTSetBits(TAS5731_PDN_PORT, TAS5731_PDN_PIN_MASK);
DelayMs(150);

PORTSetBits(TAS5731_RESET_PORT, TAS5731_RESET_PIN_MASK);

DelayMs(150);
I2C_Init();
DelayMs(150);
TAS5731_WriteReg(0x1B, 0x00);
DelayMs(150);
DelayMs(150);
DelayMs(150);
TAS5731_WriteReg(0x06, 0x0);
TAS5731_WriteReg(0x1A, 0x0A);
TAS5731_WriteReg(0x0A, 0x08);
TAS5731_WriteReg(0x08, 0x08);
TAS5731_WriteReg(0x14, 0x54);
TAS5731_WriteReg(0x13, 0xac);
TAS5731_WriteReg(0x12, 0x54);
TAS5731_WriteReg(0x11, 0xac);
TAS5731_WriteReg(0x0E, 0xd1);

TAS5731_WriteReg(0x10, 0x2);
TAS5731_WriteReg(0x0B, 0x0);
TAS5731_WriteReg(0x10, 0x2);
TAS5731_WriteReg(0x1C, 0x2);
TAS5731_WriteReg(0x19, 0x30);

TAS5731_WriteReg(0x1a, 0xa);

TAS5731_WriteReg(0x05, 0x84);

I have also attached the schematic of the TAS5731 part..

0574.lds1_23.pdf

Any clue on what we could try to make it output anything other than a 50% pwm... ?

Thank you very much.

Ibrahim,

MCLK is required to play audio, and can not be left unconnected. (The reference to generating the internal clock in absence of external MCLK in the data-sheet, only applies to internal DCLK which sustains I2C operations & Idle PWM switching in the absence of external MCLK).

To play audio, MCLK is required. If a 44.1k OR 48k Fs rate is being used, one option is use to SCLK=MCLK=64*Fs

-Ravi

Thanks a lot :)

We tried that (we tied SCLK and MCLK together), they are both now showing 2.82MHz for a 44.1 KHz I2S input.

However, we still have the same problem.. IDLE 50% PWM.... any clues??

Thanks a lot for your help.

UPDATE: Now reading the error register (0x2) gives 0xB0.

This means MCLK, LRCLK and SCLK are all unstable... They seem fine on the scope though... Anyway to correct this problem?

Update again!

So, we did some logic analyzer captures, and here is the thing: The number of MCLK cycles is not stable, as the ERROR register says. but it is not that bad. We sometimes get 62 MCLK cycles in a LRCLK cycle, instead of 64... 

does the LRCLK has to contain exactly 64 cycle of SCLK and/or MCLK ? is there any tolerance..?

Sorry, another update.

I just noticed in the datasheet that errors need to be cleared. Did that each time just after reading, and e have no any errors any more. Must have been some persistant error catched at startup..

Now we're back to the same problem: No error and no audio, just 50% PWM signal...

any clues?

I noticed that the I2C init script does not include a write to volume register 0x07 (default would be mute). - Can you confirm? 

-Ravi

That's correct. IT was commented out and decommented a dozen of times while testing (before connecting the MCLK).

Now everything is fine, thank you very much.