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SN74LV4051A-Q1 Question about IC spec

na na78
Guru 16770 points
Other Parts Discussed in Thread: SN74LV4051A, SN74LV4051A-Q1

Hi

We have questions about SN74LV4051AQ1.

1.
We found the difference of absolute maximum ratings description between SN74LV4051A-Q1 and SN74LV4051A,
for Input clamp current, IO diode current.(min/max values seems to be reverse)

Which is correct?

2. Does the input pin (Y0-Y7) have ESD protection diode internally?
What is the current value that can be accepted for Y0-Y7?

3. Do you have more detailed functional block diagram than that in the datasheet?

Bestregards

  • 0
    Guru 259500 points

    For negative values, it is debatable whether you call them "minimum" or "maximum". (Although a mathematician would disagree.)
    For either device, the input clamp current must not exceed 20 mA flowing inside.

    The Y0…Y7 pins are both inputs and outputs, so VIO applies. It must not go above VCC, so there are ESD protection diodes.

    The maximum current is determined by the switch resistance, i.e., by how much of a voltage drop you can accept. (And you have to consider the allowed power dissipation.)

  • 0 in reply to Clemens Ladisch
    Guru 16770 points
    Hi Clemens

    Thank you for your reply.

    We understood there are ESD protection diodes at Y0-Y7 ( and including COM, right?).

    Then, what is the topology of ESD protectino diodes connection at IO?
    We image INPUT to VCC and INPUT to GND, is it correct?

    BestRegards
  • 0 in reply to na na78
    Guru 259500 points

    The −0.5 V limit shows that there is a diode from GND to the pin.
    The VCC + 0.5 V limit shows that there is a diode from the pin to VCC.