Other Parts Discussed in Thread: THS8200
Hi Team,
My customer will use THS8200 on board to convert BT.1120 to VGA. Could you please kindly help to review schematic design as attached? Thank you.
Input signal : YCrCb 4:2:2 /16bit
Internal sync
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Hi Team,
My customer will use THS8200 on board to convert BT.1120 to VGA. Could you please kindly help to review schematic design as attached? Thank you.
Input signal : YCrCb 4:2:2 /16bit
Internal sync
Lillian,
Here are comments on schematic.
Suggested to use pulldown resistors to bias unused data inputs to ground (RCR and unused bits of GY, BCB)
Recommend reviewing layout document here:
If using split plane, then AGND/GND_DLL should be filtered from DGND.
It was also suggested that AC coupling to be used on outputs. This is application specific.
Passive reconstruction filters are okay, but better quality can be achieved (with higher cost) when using an active filter.
May want to consider using level shifters on the H & V syncs, as these should technically be 5V outputs. However most modern monitor work well with 3.3V outputs.
BTW, the EP version of this device is moving to NRND status soon. This is due to the lack of expertise remaining for this device within TI.
Regards,
Wade
Hi Wade,
Many thanks for your support!
two questions:
1. May want to consider using level shifters on the H & V syncs, as these should technically be 5V outputs. However most modern monitor work well with 3.3V outputs -> You mean from our device, HS/VS_OUT signal level is 5V?
2. It was also suggested that AC coupling to be used on outputs. -> Suggest add AC caps on RGB output, right? What's the recommend AC cap value?