Hi,
The timing to input SCKI, BCK, LRCK and DIN during power-on isn't mentioned in Figure 20.
Could you please tell this recommended timing chart in detail for clocks and data?
Best regards,
Kato
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Hi,
The timing to input SCKI, BCK, LRCK and DIN during power-on isn't mentioned in Figure 20.
Could you please tell this recommended timing chart in detail for clocks and data?
Best regards,
Kato
The BCK/LRCK/and DIN can start at the same time, though only the SCK input will allow the device to exit the internal reset state. Allowing BCK/LRCK/DIN to start before or after SCK will not impact performance.
Thanks,
Paul