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TAS5414B-Q1: Turn-On Common Mode Ramp Time and Gain Ramp Time

Part Number: TAS5414B-Q1

Hello,

I have some questions about TAS5414B-Q1.

  • The data sheet says the turn-on common mode ramp time and the gain ramp time of the TAS5414B-Q1 are about 26 ms and 76 ms respectively with a 220-nF capacitor on the MUTE pin, but how much are these values with a 100-nF capacitor?
    • I suspect they are proportional to the capacitance value if a constant current source charges the capacitor through the MUTE pin. Correct?
  • If the muted TAS5414B-Q1 is unmuted during these ramp periods by the register 0x0C, which setting will be valid - mute or unmute?
  • Is there a way to confirm the mute/unmute status by a pin status without an I2C access?

Best regards,
Shinichi Yokota

  • Yokota-san,

    The Mute pin capacitor is driven by current sources to create the different ramps necessary for the common-mode ramp and the gain ramp.  One can scale the ramp times based on the datasheet values.  If you use a 100nF capacitor, the times would be slightly less than half the datasheet values provided for 220nF.  Please note that pop and click can be affected by reducing this capacitor value.

    The I2C controls the charge and discharge of the mute cap.  If an external transistor pulls the mute pin low, the external signal takes priority

    You should have I2C access.  You can monitor the mute pin voltage with an external circuit.

    Regards,
    Gregg Scott

  • Gregg-san,

    I'd like to continue this discussion off line.

    Best regards,
    Shinichi Yokota

  • Gregg-san,

    How can I check by a register if the TAS5414B-Q1 is surely in an unmute state (Play mode) before issuing a command to mute it? Besides, how can I check by a register if the TAS5414B-Q1 is surely in a mute state (Mute mode) before issuing a command to unmute it?

    According to Figure 18 of the data sheet, I guess HIZ_Report_x = High indicates a mute state and PLAY_Report_x = High suggests an unmute state. If that's correct, the TAS5414B-Q1 can be unmuted when the bits D[3:0] of the External Status Register 2 (0x05) are 1, and it can be muted when the bits D[3:0] of the External Status Register 3 (0x06) are 1.

    Please confirm.

    Best regards,
    Shinichi Yokota

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