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PCM1754-Q1: BCK/SCK for I2S data format

Part Number: PCM1754-Q1
Other Parts Discussed in Thread: PCM1754, CDCS504-Q1

Hello, Team,

Our customer is adopting PCM1754 in their system.
Input data will be I2S and we have a question about SCK and BCK.
Fs is 44.1kHz.

  1. Because of the SoC, which outputs a clock for SCK, it can only output 5.647MHz.
    It is slightly different from what is give in the datasheet ie 5.6448MHz as a acceptable SCK for fs = 44.1kHz.
    Is this still OK?
  2. In the datasheet, it says that if the data is outputted with I2S, BCK should be 48*fs or 64*fs.
    This means that if fs=44.1kHz, BCK should be either 2.1168MHz or 2.8224MHz.
    Are these the only acceptable BCK or can we use BCK=5.647MHz for I2S?

Best,
Masaru