Hello,
I am using the TLV320ADC3100 in a design and have not been able to get the right channel to send data. I have managed to get audio out of the left channel, however.
The design uses IN2L and IN3L in a differential setup for the left channel and uses IN2R and IN3R in a differential setup for the right channel. The inputs are DC coupled with the common mode set to VCC/2.
The clock is extracted from BCLK using the PLL. BCLK and WCLK are fed into the IC and SDATA is sent out.
Here is the startup code used to initialize the chip.
// Set register page to 0 i2c_write (ADD_ADC, 0x00, 0x00); // Reset ADC i2c_write (ADD_ADC, 0x01, 0x01); pca_2_wait(1 * PCA_TICKS_PER_MS); // Setup ADC PLL // Set PLL to multiply BCLK by 8 i2c_write (ADD_ADC, 0x04, 0x07); i2c_write (ADD_ADC, 0x05, 0x18); i2c_write (ADD_ADC, 0x06, 0x01); i2c_write (ADD_ADC, 0x07, 0x00); i2c_write (ADD_ADC, 0x08, 0x00); // Power up PLL i2c_write (ADD_ADC, 0x05, 0x98); // Set ADC clock dividers // NADC = 2 i2c_write (ADD_ADC, 0x12, 0x82); // MADC = 2 i2c_write (ADD_ADC, 0x13, 0x82); // AOSR = 128 i2c_write (ADD_ADC, 0x14, 0x80); // BCLK N = 8 i2c_write (ADD_ADC, 0x1E, 0x84); // 24-bit i2s, BCLK in, WCLK in, No tri-stating of DOUT i2c_write (ADD_ADC, 0x1B, 0x20); // Switch to page 1 i2c_write (ADD_ADC, 0x00, 0x01); // Setting MICBIAS to Unused i2c_write (ADD_ADC, 0x33, 0x00); // Setting ADC routing and gain // Differential Left i2c_write (ADD_ADC, 0x34, 0x3F); // Differential Right i2c_write (ADD_ADC, 0x37, 0x3F); // Left 0dB i2c_write (ADD_ADC, 0x3B, 0x00); // right 0dB i2c_write (ADD_ADC, 0x3C, 0x00); // Power up ADC // Switch back to page 0 i2c_write (ADD_ADC, 0x00, 0x00); // Power up left/right ADC i2c_write (ADD_ADC, 0x51, 0xC2); // Unmute ADC i2c_write (ADD_ADC, 0x52, 0x00);
Is there some setting or configuration that I'm missing in order to get audio out of the right channel?
