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TAS6424L-Q1: About DSP mode in SAP Control

Part Number: TAS6424L-Q1
Other Parts Discussed in Thread: TAS6424

Hello Team. 

I would like to know about the difference between DSP mode and I2S mode in TDM case. 

Currently, when I play a 48KHz/16bit/8ch with DSP mode, I am listening to the noise only.

But when I change INPUT FORMAT of SAP Control Register(0x03) from DSP mode to I2S mode, I can listen to it well.

So, I'm wondering what the difference is between them.

When I take a look at Figure19. TDM8 Audio Data Format(tas6424l-q1.pdf), I can see how i2s/left justified mode works.

But I can't see any DSP mode figure in this Figure. 

Could you let me know what DSP mode is and explain me how to work based on Figure 19. TDM8 Audio Data Format?

Thank you and Regards,

KW

======================================================

root@euto-v9-discovery:~# i2cdump -f -y 27 0x6a
No size specified (using byte-data access)
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 0f 32 62 56 00 8f 8f 8f 8f 01 01 01 00 00 00 00 ?2bV.???????....
10: 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 .?..............
20: 00 00 01 14 00 00 40 21 0a 00 00 00 00 00 00 00 ..??..@!?.......
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50: 00 00 00 aa 00 00 00 00 00 00 00 12 32 f2 00 00 ...?.......?2?..
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

  • Hi 

       I think there's something strange from you description. I want to align with you on the clock ratio we are using. As your description 48KHz/16bit/8ch, the SCLK frequency should be 6.144MHz. Could we use oscilloscope to capture SCLK and FSYNC, and test their frequency as the first step?

  • Hi 

    I got the captured screen shot. 

    But whenever I try to upload it on this site, nothing happens. 

    Is there any way to share this screen shot?

    Anyway, BCLK is 6.144MHz and FSYNC is 48KHz.

    And if you don't mind, could you let me know why DSP mode in Figure19 isn't described?

    Thank you and Regards,  

    KW

  • Hi

    Is there any way to share this screen shot?

    Usually copy the picture into this chat dialogue would be fine.

    And if you don't mind, could you let me know why DSP mode in Figure19 isn't described?

    For our devices, the DSP mode almost no difference with TDM mode, and TDM seems more commonly used for audio signal.

    I'll use EVM to check your using condition today.

  • Hi Shadow,

    Please refer to the attached capture file which is screen shot.

    Best regards

    Joey Kim

  • Hi Joey

       I tested the same results as your side. I think it's some problem for this device. And through my testing, there's some workaround, please keep choosing I2S mode in register 0x03, and set the bit4 to 1, should able to work normally. Meaning set 0x54 into register 0x03. 

       Sorry for your trouble.

  • Hi. 

    Thank you for sharing the test result.

    Then if I want to play 48/32/8, do I need to set up TAS6424 with I2S mode and 32bit TDM slot size?

    In other words, set 0x44 into register 0x03?

    Thanks and Regards,

    KW

  • Hi KW

    Then if I want to play 48/32/8, do I need to set up TAS6424 with I2S mode and 32bit TDM slot size?

    I also tested this condition, and it's no problem to do this. Set 0x44 into register 0x03 would be fine.