TLV320ADC3120: TLV320ADC3120 - DC Offset Signal

Hi,

for a project I want to utilize the TLV320ADC3120 ADC for Audio-like signals.

My signals are DC coupled, 0-800mV Sine, 5kHz.

For some reason the adc, once configured is pulling my signal up to 1.5V on its inputs, even if the inputs are completly open.

Can i somehow witch this behaviour off? I want to simply get a digital representation of my signal the way it is.

My inputs are single ended. INXM are tied to ground. AVDD is 3.3V. GPI2 is floating.

Interestingly if I switch SLEEP_CFG_AREG_SELECT_EXTERNAL, then i dont get the DC offset anymore, but also all data returned by the ADC is 0.

Register Configuration:
 
SLEEP_CFG = (SLEEP_CFG_AREG_SELECT_INTERNAL | SLEEP_CFG_SLEEP_ENZ_ACTIVE);

BIAS_CFG = (BIAS_CFG_MBIAS_VAL_IN1M);

IN_CH_EN = (IN_CH_EN_CH1_ENABLED | IN_CH_EN_CH2_ENABLED);

ASI_OUT_CH_EN = (ASI_OUT_CH_EN_CH1_ENABLED | ASI_OUT_CH_EN_CH2_ENABLED);

CH1_CFG0 = (CH1_CFG0_INTYP_MIC | CH1_CFG0_INSRC_SINGLE |CH1_CFG0_DC_DC	);

CM_TOL_CFG = (CM_TOL_CFG_CH2_INP_FULL |CM_TOL_CFG_CH1_INP_FULL	);

CH2_CFG0 = (CH2_CFG0_INTYP_MIC | CH2_CFG0_INSRC_SINGLE |CH2_CFG0_DC_DC |CH2_CFG0_IMP_10k);

PWR_CFG = (PWR_CFG_ADC_PDZ_ON |  PWR_CFG_PLL_PDZ_ON | PWR_CFG_MICBIAS_PDZ_ON);