TAS6424R-Q1: check PVDD capacitor value selection

Hi.

Assume that all output of the amplifiers is the same and the load is resistive.

Total power equal to 4*40+4*20=240WRMS.

From the PVDD port, the prior stage can be equivalent to an internal resistance of the converter + PVDD capacitor. 

• f< cutoff frequency, loop gain is large, where the converter internal resistance dominates.

• f> cutoff frequency, loop gain becomes smaller, where the impedance of the capacitor dominates.

Assume the f cutoff to be a typical value, which equals to 5kHz. So, we can calculate the PVDD value as below:

Δi=C*ΔV/Δt, C=Δi*Δt/ΔV.

Δi=240W/(ƞAMP*PVDD)=240/(0.85*14.4)=19.6A.

Δt=(1/5000)*0.25=5*10^-5s.

ΔV=1V.

The C need to more than 980uF.

This is a simple calculation; you can take it as a reference.

Notes:

• Do the 2 TAS6424 you mentioned involve the frequency divide processing? If the frequency is divided, the AMP only outputs one frequency at a time, so you can calculate it based on the maximum power (generally lower frequencies are higher power). 
• Actual value needs to adjust according to the bench tests.

BR.

Wei Qiu.

Hi

wu yujiao said:

Could you help to introduce what's meaning of Δi and ΔV and Δt？

Using the ripple of PVDD capacitors to do the calculation.

ΔV is the ripple of capacitor, Δi is the AC ripple of input current which can be calculated as Δi=240W/(ƞAMP*PVDD).

Δt is the time of the current change. It should be T/4.

BR.

Wei Qiu.

Hi Yujiao

  The PVDD and VBAT pin has ramp speed also maximum value requirement, datasheet list them. No requirement for ripple voltage. For performance, as Quiwei listed, would consider using 1V Vpp to do the calculation. For larger ripple, the customer could decided, balance from cost and performance.