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Tool/software:
Reference: SLASF23 – DECEMBER 2023
[1] page 7, states: GPIOx or GPIx (used as MCLK input) clock frequency
Though the configuration register define GPO and GPIO as OUTPUT for PDMLCK.
There is no other mention in the datasheet for GPI and MCLK . Or is PDMCLK this different than MCLK?
Bottom line, can 5212 use external MCLK ? if yes, how ?
Context: considering to use this with an MPU or/and a RPI2040. Now working on schematics.
[2] Could not find information how to configure the FOUR different I2C address. There is only one ADDR pin ?
[3] Do you have plan to submit a driver to vanilla Linux kernel ? (not just Android)
Could such driver support cascade mode to use multiple CODECs in paralle. i.e 4 CODECS for 8 in/out channels of 48Khz .
[4] Is there any hardware reset support or would that be to turn off/on power using an external MOSFET ?
Thanks a lot.
Hi,
I'll address the first part of your question while our experts address the linux side
1) Table 7-41 shows all the GPI/GPIO assignments, and it shows that both GPI1 and GPIOs support a master clock input (called Controller Clock CCLK).
2) The address options are in the table below. This will be shown in the final data sheet.
3) Other expert will comment here
4) There is no hardware reset support for this device.
Best regards,
Jeff McPherson
Dear Jeff, Thank you very much for the prompt reply. With this was able to complete the schematic and board layout.
Awaiting the kernel feedback, would it be safe to gerber out a PCB based on the current specification or is there a potential of hardware changes. As mentioned somewhere else the parts would become available in the next 1/2 months, if that for TAC5112 and.or TAC5212, About when is a final specification expected ?