The two-layer TAS5630DKD2EVM board uses huge traces to connect the TAS5630 to its PVDD capacitors. I presume that is because its outputs share a layer with PVDD. But the outputs and PVDD can use separate layers on a four-layer board. If one makes a four-layer printed circuit board with 2-ounce inner plane layers for PVDD and GND near the TAS5630B and PVDD capacitors, is there a good reason not to connect the TAS5630 to the PVDD capacitors through the planes instead of huge traces?
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