Hi,
I still have problems with my AM3517 board with the TAS5719 codec. Now I have the SCLK and MCLK tied together but only work when
the MCLK frequency is in range (from datasheet this is from 2.8224 to 24.576 MHz). When I try to play a stream with 16 bits per sample,
stereo I need a 1.536MHz bit clock ( 48000 * 16 * 2). Then using a 62 divisor, from the system 96MHz clock, I get this frequency on SCLK
and MCLK. This frequency is out of range for the MCLK specification, but the datasheet says on pag 21:
"The clock section uses MCLK or the internal oscillator clock (when MCLK is unstable, out of range, or absent) to produce the internal
clock (DCLK) running at 512 times the PWM switching frequency."
How can I activate this internal oscillator in order to play samples with MCLK out of range? Am I missing something?
When I play 32 bits per sample streams, stereo works fine, MCLK then is 3.072MHz (on range!)
Any help is welcome!
Thanks
