I'm running a TAS5630 at PVDD=51V PBTL into 2 ohms.
The chart from the user guide slau287a indicates that 500W PVDD=50V THD soud be ~1%. In order to provide a little more margin I'm running at 51V. I'm finding that I can only get to 400W and maintain 1% (looking at 3rd harmonic only, btw).
I've checked for power supply drop and looked at the outputs OUT_A etc. I see from the outputs that about 3V is being dropped across the output FET Rds i.e 6v in total. That accounts for most of the the measurements since (51-45)^2/2/2 = 500W but there is no margin at all. However on the face of it, it would seem that the device is not meeting specs. The layout is at least as good as the EVM.
Is this what you expect? Any suggestions, gate drive. bootstrap?
THD info and OUT captures below:
