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PCM1795 THD in external digital filter mode

KANJI SHIBATANI
Mastermind 6205 points
Other Parts Discussed in Thread: PCM1795

Hello

 

 My customer is using PCM1795 for thier CD-P several years for their products, and they intends
to use for their 2015model also ,


However, recently, they found the THD had 7dB worsen（103 to 96.5dB(0.0015%)  compared with
old Lot (2year ago) in their pre-production..


When they had replaced the old stock in their PCB on Pre-Production, THD improved.
They are concerned about any change in the PCM1795 production..


Cusomter's setting; is   following  and did not change basic design from past 3years.:

Input 44.1KHz(CD)
x8 oversampling : using customer's own external digital filter(DSP)

WDCLK= 705.6KHz
BCLK= 22.5792MHz(512fs)
Sys CLK(SCK)=512fs
DFMS=0 (MONO)

 

Q1: First of all, I think  customer's usage in the following is no problem , isn't it?

SCK = fs * OSR= fs * OSRint * OSRext.
For example, fs = 44.1kHz, OSRint = 32x, OSRext = 16x,
therefore SCK = 22.5792MHz.

I think it  seems No problem from the Data sheet Table3(Page21), 512fs description .
How do you think about this?
I find following in the forum also..


https://e2e.ti.com/support/data_converters/audio_converters/f/64/p/312810/1089142#1089142


Q2  Please advise about the relationship between THD~ OSR in case external digital filter mode?

For example, THD/SNR  is in inverse propotion to OSR? (For example, 3dB worsen x2 times OSR ? customer think so )
Or, there are no relationship?

Q3  What valuse of THD should be for customer's setting( WCLK=768KHz)?
0.0015% is make sence ?
   
Q4  Please advise about the relationship between SNR~ OSR in case external digital filter mode

 

  • 0
    TI__Mastermind 27870 points
    Hi Kanji,

    Q1: I believe these settings are possible with the part, and since they have had a design with it for 3 years, that is strong evidence for it. Although I question your OSRint and OSRext names. The part is limited to 16x OSR setting when in digital filter bypass mode. This means that PCM1795 with see the WDCK as 16x the target sampling frequency.

    Q2: I am not sure the exact relationship between THD and OSR, but I do think there is a sweet spot for best THD vs OSR for each sampling rate. There is a limit to what speed any part can run at, so if you try to over sample a 192 KHz signal by 16x, the part would not be able to handle it. This is why there is the statement on the data sheet " The 16× WDCK oversampling rate is not available above a 100-kHz sampling rate". But a general rule is that you want to run about as fast as you can on oversampling to improve the average of the sigma delta before it is output.

    Q3: If the part can operate at the sampling rate along with the 768 KHz WDCK, then you should meet the data sheet specs if your pcb is well designed/similar to the EVM.

    Q4: This is similar to my explanation of the THD-OSR ratio.

    Justin