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LM4952 problem when restart

Other Parts Discussed in Thread: LM4952

Hello Team,

I'd like to ask you about LM4952.

LM4952 can't output audio for a few minutes if LM4952 immediately restarts after power-off.

However LM4952 can output audio if LM4952 restarts after a few minutes from power-off.

Could you tell me the conceivable causes for that?

I think the decreasing Vdd gradually when power-off is the reason.

Best Regards,

Hidetoshi Matsunami

  • Hi Hidetoshi,

    I will take a look at this issue and try to get back to you soon.

    Andy

  • Hello Andy,

    Any update on this issue?

    Best Regards,

    Hidetoshi Matsunami

  • Hi Hidetoshi,

    I found a LM4952 EVM yesterday but I couldn't duplicate your issue.

    In addtion, I discussed this issue with my colleague. Below are his comments.
    "I don’t think it will take a few minute to have output when the device turns on immediately after turn-off. If power supply turns on immediately after turn-off, the device will not be turned off. Instead it will stay enabled till the power supply voltage goes down to around 9V.

    After all the cap charges are discharged and then device is turned on, the output will appear in around 400 ms to 500 ms, which is called wake-up time. Usually the device’s on/off control is done by S/D control, not by turning on/off power supply. The device outputs the signal after the wake-up time."

    Andy
  • Hello Andy,

    Thank you for your reply.

    We have to turn off power supply after S/D off for normal operation.

    Is my understanding correct?

    Also, I'd like to ask you additional question.

    Can Vsd ensure “Low” when S/D pin is applied to 2V ~ Vdd/2?

    Best Regards,

    Hidetoshi Matsunami

  • Hi Hidetoshi,

    What do you mean by "ensure low" or "ensure high"? Do you mean whether the amplifier's output is low or high?

    Andy 

  • Hello Andy,
    I apologize for any confusion.
    Yes, it is as you understand it.
    Best Regards,
    Hidetoshi Matsunami
  • Hi Hidetoshi,

    I just took some measurements with a LM4952EVM. When the /shutdown pin is applied with a voltage between 2.0 and Vdd/2 (where Vdd = 12V), the 2 outputs (with respect to the GND pin) will be very close to zero.

    Andy
  • Hello Andy,

    Thank you for your support and sorry for the confusion.

    Let me try to explain what I would like to ask.

     

    1.

    As I originally posted, my customer has been facing start-up issue that LM4952 does not re-start correctly. And from your comment below, I now suspect their turn-off/on sequence possibly cause the start-up issue.

    > Usually the device’s on/off control is done by S/D control, not by turning on/off power supply.

    Do you think it’s required the sequence below to prevent issue?

    Turn-Off: SHUTDOWN goes to low, then turning off Vdd.

    Turn-On: Turing on Vdd first, then SHUTDOWN high.

     

    On top of that, datasheet describe about the click and pop reduction as below.

    I’m thinking the state which Vdd is going down while SHUTDOWN voltage remains high, possibly make LM4952 unstable state. Do you have any comment?

     

    3.

    I’d like to confirm about the S/D voltage threshold, too, because when I discussed with my team, this can be understood as two different meanings.

    • Case1: If input signal is more than 2V, LM4952 can be enabled. So 3.3V signal is okay. The voltage up to Vdd/2 is also okay.
    • Case2: The threshold to enable LM4952 is somewhere in between Vdd/2 to 2V. This means we need to have input signal more than Vdd/2 at least to enable LM4952.

     

    Can you help me to understand this specification correctly?

    Best Regards,

    Hidetoshi Matsunami

  • Hi Hidetoshi,

    Would you post the schematic?

    Andy
  • Hello Andy,
    I'm sorry, I can't post my customer schematic to E2E forum.
    Would you tell me your contact information?
    I'll directly send the schematic to you .


    Best Regards,
    Hidetoshi Matsunami

  • Hi Hidetoshi,

    No worries!

    I have got some comments from my colleague in Japan.
    Here they are:
    "It will be better to have start-up sequence because the device's turn on/off logic will correctly work when Vdd reaches above 9.6V. Because the device operating voltage range is from 9.6V min. After Vdd reaches 9.6V or above, S/D logic will be effective.

    But if you control S/D pin in short time, the charge on Bypass pin is not discharged, and then you made enable, the device will be always enable.

    To make enable and disable work correctly, you will need to discharge all capacitor’s charge and after that turn on the device, then the device will start up from disable mode.
    To disable the device, S/D low first then Vdd turn Off will be better."

    The answer to you last question is that Case 1 is the correct.

    Andy