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TPA3004D2: Output pins

Hi,

I am planning to use only one input and grounding the other. Grounding one input would result to its associated driver being off. Does that mean that I can leave said associated output pins floating? Specifically, pins 37 to 48? Or are there other things I would need to do for said pins?

 

Also, I added an LC filter in Figure 40 to the LOUT+/LOUT- of the TPA3004D2EVM and found an unwanted DC voltage of ~6.68V across the load. I’d like to get rid of said voltage by adding capacitors shown in Figure 40A. However, I’m having a difficult time calculating what value capacitor I need. How do I go about finding the capacitor value I need that will keep the range of 20Hz to 20KHz at the line out? Is there another way to get rid of the DC voltage?

 

Please advise.

Thanks!

  • Hello,

    1. If only one channel of audio is required the inputs of the unused channel should be tied to ground through 1uF DC blocking caps. The PVCC pins are the high current supply input to the output FET bridge and are separated for each channel. For the unused channel simply connect the corresponding PVCC to ground. The bootstrap capacitors for the unused output should still be connected between the output and the corresponding BSxx pin. With this configuration the output does not need to be connected to anything other than the BS capacitors as already mentioned.

    2. Make sure to measure the voltage across the load differentially since the output bridge is differential in nature. The load is never ground referenced and is across an output H-bridge.

    Can you clarify the figures you are referring to? The D/S has figure 40 but not 40A.

    The inductors and capacitors chosen for the output filter are chosen by simply Fc = 1/(2*pi*Sqrt(LC)) which is the LC filter cutoff frequency. This is a low pass filter and provides no attenuation at low frequencies. The Q of the filter is dependent on the load.
    See this app note: www.ti.com/.../sloa119

    Best Regards,
    Matt

  • Hi Matt, thanks for the help here.

    Figure 40A refers to my personal drawing modification.
    Based on your reply, it seems that the standard 1uF ceramics will serve well for the diagram below.

  • Hi Ed,

    The added series capacitors in red are not necessary and incorrect unless a high pass pole needs to be added. They may also hurt to pop performance of the amplifier.

    The voltage to ground on each side of the speaker should be identical and therefore there is no offset across the speaker.

    Regards,
    Matt
  • HI Team,
    this was originally my question... i have more: Is there a way to decrease the difference between the gain steps for the Volume and Varout Controls shown in the 3rd column of Table 1 and 2 of the data sheet(attached)? Most of the steps have >2.5dB difference between them and I’d like to decrease the difference if possible.
    Thanks,
  • Hello,

    Unfortunately the gain steps outlined in the datasheet are fixed and the step size cannot be adjusted. 

    However, a voltage divider or potentiometer on the analog inputs can be used to achieve a desired Vout for a selected gain and input signal level. The gain step size will be the same however this will give more control on the exact Vout voltage for a given input signal level.

    Best Regards,

    Matt