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TLV320AIC3100 + CC256XQFNEM ASSISTED MODE - No Service Level Connection Establishment

Other Parts Discussed in Thread: CC256XQFNEM

Hi, 

I'm using STS32F4-DISC, cc256xQFNEM and TLV320AIC3100EVM-U with assisted mode.

I'm trying to connect two systems using HFP protocol and running HFPDemo HFPAGDemo (bluetopia version 4.0.2.2).

There is no way to establish Service Level connection.

My question is: if the codec and codec interface on CC256xQFNEM is not configured correctly or the codec is not connected, is there any problem to setup Service Level Connection?

Thanks In Advance,

Paolo

  • Hi, Paolo,

    Regarding the TLV320AIC3100EVM-U, it is recommended to have all the register configuration in order to use this device without problems. There are several example configurations in datasheet and Codec Control software that can be used to configure the EVM.

    Regarding the CC256xQFNEM, I would recommend to search for more information in Dual Mode Bluetooth Forum (e2e.ti.com/.../660. They may provide you a better support on this device.

    Best regards,
    Luis Fernando Rodríguez S.
  • Ok, Thanks,

    i didn't find any example on the correct configuration of TLV in order to use WBS assisted mode...

    Any idea? do you see any error? 

    Here follows my configuration:

    reg 0x00 = 0x00 // page 0

    reg 0x01 = 0x01  // reset the device
    reg 0x03 = 0x02    // over temperature protection -> normal operation
    reg 0x04 = 0x07  // clock generation muxing -> PLL_CLKIN = BCLK, CODEC_CLKIN = PLL_CLK
    reg 0x05 = 0x92 // PLL P = Power up, divider 1 , R = 2 (multiplier)
    reg 0x06 = 0x20 // PLL multiplier J = 32
    reg 0x07 = 0x00 // PLL D-Value MSB
    reg 0x08 = 0x00 // PLL D-Value LSB
    reg 0x0b = 0x84 // DAC NDAC power up, divider 4
    reg 0x0c = 0x84 // DAC MDAC power up, divider 4
    reg 0x0d = 0x80 // DOSR 128
    reg 0x12 = 0x84 // ADC NADC power up, divider 4
    reg 0x13 = 0x84 // ADC MADC power up, divider 4
    reg 0x14 = 0x00 // ADC AOSR = 256
    reg 0x15 = 0x80 // ADC IADC_VAL (default)
    reg 0x1b = 0x0c // Codec Interface Control I2S, word 16 bit, BCLK output, WCLK output, DOUT High Imp. disabled
    reg 0x1c = 0x01 // Data Offset 1 bit
    reg 0x74 = 0x00 // VOL-MICDET-Pin SAR ADC (see datasheet)
    reg 0x44 = 0x00 // DRC Control 1 disabled for left and right channel
    reg 0x41 = 0x00 // DAC Left Volume Control 0 dB
    reg 0x42 = 0x00 // DAC Right Volume Control 0 dB

    reg 0x00 = 0x01  // page 1
    reg 0x21 = 0x4e  // HP Output Drivers POP Removal (see datasheet)
    reg 0x1f = 0x82  // Headphone drivers (see datasheet)
    reg 0x23 = 0x88 // Output mixer routing (see datasheet)
    reg 0x28 = 0x0e  // HPL Driver
    reg 0x29 = 0x0e  // HPR Driver
    reg 0x24 = 0x00 // Left Analog Volume to HPL
    reg 0x25 = 0x00 // Right Analog Volume to HPL
    reg 0x2e = 0x0b // MICBIAS
    reg 0x30 = 0x40 // Delta Sigma (see datasheet)
    reg 0x31 = 0x40 // ADC Input Selection for M Terminal

    reg 0x00 = 0x00 // page 0
    reg 0x3c = 0x0b // DAC instruction set

    reg 0x00 = 0x08 // page 8
    reg 0x01 = 0x04 // DAC coefficient buffer control

    reg 0x00 = 0x00 // page 0
    reg 0x3f = 0xd6 // DAC Data Path setup
    reg 0x40 = 0x00 // DAC Volume control
    reg 0x51 = 0x80 // ADC Digital MIC
    reg 0x52 = 0x00 // ADC Digital volume fine adjust

    reg 0x00 = 0x01 // page 1
    reg 0x2a = 0x1c // SPK driver
    reg 0x2b = 0x1c // reserved
    reg 0x20 = 0xc6 // class D Speaker amplifier

  • Hi, Paolo,

    The register configuration seems to be in order. I would recommend to verify if your clock settings are being configured correctly. I noticed that AOSR and DOSR are different, so this could generate a different sampling rate in both ADC and DAC. Also, there's a data offset being configured, is this correct for your application? The rest of the registers seems to be alright. Have you verified in the Dual Mode Bluetooth Forum if this could be related with the other device?

    Best regards,
    Luis Fernando Rodríguez S.