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TAS2552: TAS2552 WCLK setting issue

Part Number: TAS2552

Hi all,

 My customer is testing TAS2552 in different WCLK input. They have issue in testing WCLK in 8KHz, 96KHz and 192KHz. Is there any setting I have to take care in those frequency except bit 2-0 in Reg 0x03? Thanks for your help.

Gary

  • Hello Gary

    My colleague has been notified about your question. The response may be delayed because he is out of the office on holiday.

    Best Regards
    José Luis Figueroa
    Audio Applications Engineer
  • Hi Gary,

    What is your complete register configuration? What is your clock reference and how are you dividing this clock to set the sampling rate?
    The sound is distorted or there is no sound at all?

    Best regards,
    -Ivan Salazar
    Texas Instruments
  • Hi IvanSalazar

    The configuration is:

    # 32-bit 64-fs
    # Slave Reg Value
    w 80 01 12
    w 80 08 10
    w 80 02 EA
    w 80 03 5D
    w 80 04 00
    w 80 05 10
    w 80 06 00
    w 80 07 C8
    w 80 09 00
    w 80 0A 00
    w 80 12 15
    w 80 14 0F
    w 80 01 10

    w 80 03 5F
    w 80 12 11

  • Hi IvanSalazar

    And my next question,

    I use Audio Analyzser to receive the pdm data, it shows me perfact sinewave,
    But the TAS2552EVB out+ out- shows freak waveform, how to solve it?

    the photos is:
    mega.nz/
    mega.nz/
    mega.nz/

    My Configuration is:
    # 32-bit 64-fs
    # Slave Reg Value
    w 80 01 12

    # BCLK
    w 80 01 32

    w 80 08 10
    w 80 02 EA
    w 80 03 5D
    w 80 04 00
    w 80 05 10
    w 80 06 00
    w 80 07 C8

    # PLL_J
    w 80 08 60

    w 80 09 00

    # PLL_D
    w 80 09 2E

    w 80 0A 00

    # PLL_D
    w 80 0A 0F

    w 80 12 15
    w 80 14 0F
    w 80 01 10


    #Audio Gain
    w 80 12 0A


    #============= AT PDM =============
    #PDM falling edge
    w 80 11 02

    #IV Sense Gain Enable
    w 80 13 C0

    #Synchronous reset
    #w 80 01 11

    #VI Sense Enable
    #w 80 02 EB

    #PDM (Digital Input:3F, Analog Input:BF)
    w 80 03 3F
  • Hi Tsai,

    Are you using a PDM signal? or I2S? Register 0x03 should be configured to PDM or I2S, from your register settings I see it is set to I2S.
    I'll keep reviewing the settings for any other possible issue.

    Best regards,
    -Ivan Salazar
    Texas Instruments