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TAS5342LA: Pin configuration

na na78
Guru 16770 points
Part Number: TAS5342LA

Hi 

I have a question related to the following post.

I would like to use TAS5342LA with disabling C and D port.


Holding ~RESET_CD low will keep the OUT_CD in Hi-Z.

1. In that state, is it no problem OUT_C and OUT_D are left open?
2. How about BST_C and BST_D? 
Could you please show me the connection BST_C and BST_D when the C+D is disabled?

BestRegards

  • 0
    TI__Mastermind 30100 points

    Hello,
    1. yes, it is not a problem. The outputs are technically in a high impedance state.
    2. The bootstrap capacitors should still be connected the same as they would if the channel was enabled.

    all of the Voltage sources should still be connected to channels C&D,  and the inputs should be grounded. 

    best regards,

    -Steve Wilson

  • 0 in reply to Steve-Wilson
    Guru 16770 points

    Hi Steve

    Thank you for your reply.

    >1. yes, it is not a problem. The outputs are technically in a high impedance state.

    >2. The bootstrap capacitors should still be connected the same as they would if the channel was enabled.

    These information is very helpful, but I still could not get the connection for BST_X.

    (I could not image the outputs can be left open but bootstrap cap is required.)

    So I made a simple diagram.  Could you review it if it has issue or not?

    BestRegards

  • 0 in reply to na na78
    TI__Mastermind 30100 points

    I have to apologize.  I just spoke to the design team, and they have told me that I was mistaken.  The bootstrap capacitors are not required for the disabled channel as I had previously stated.  

    The outputs of C and D can remain floating.  You will need to provide power to GVDD_C, GVDD_D and PVDD_C and D