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TLV320AIC3110EVM-U: I2S input

John Heaton
Intellectual 550 points
Part Number: TLV320AIC3110EVM-U

Now that I found out how to externally supply the I2S signal by disabling the I2S from the onboard chip, I find that the board isn't outputting my audio. 

hooked up BCLK, WCLK and DIN

Left justified, 48000hz,16bit, 1 bit delay, 64 scaling factor

I used the TI software to select from the MCLK to BCLK, but doesn't seem to have any effect. 

Here is the input signals to the EVM. Can you help me understand why its not working or suggest a script?

  • 0
    TI__Guru* 84915 points

    Hi, John,

    Please take a look at the attached script. It is an example script that fully configures the EVM. It uses a BCLK = 64*WCLK. (Our EVM uses a BCLK = 3.072MHz and WCLK = 48KHz). It is in hex format w (write) 30 (I2C address) xx (Register address) yy (Register data).

    Let me know if you have questions or comments about this.

    7331.Init_code.txt 
    #			--------------------------------------------------------------- page 0 is selected 
w 30 00 00
#			 s/w reset
w 30 01 01
#			 PLL_clkin = BCLK,codec_clkin = PLL_CLK
w 30 04 07
#			 PLL enabled; R = 1; P = 1
w 30 05 91
#			 J = 32
w 30 06 20
#			 D = 0
w 30 07 00
w 30 08 00
#			 mode is i2s,wordlength is 16
w 30 1b 00
#			 NDAC is powered up and set to 4
w 30 0b 84
#			 MDAC is powered up and set to 4
w 30 0c 84
#			 DOSR = 128
w 30 0d 00
w 30 0e 80
#			 NADC is powered up and set to 4
w 30 12 84
#			 MADC is powered up and set to 4
w 30 13 84
#			 AOSR = 128
w 30 14 80
#			 DAC => volume control thru pin disable 
w 30 74 00
#			 DAC => drc disable, th and hy
w 30 44 00
#			 DAC => 0 db gain left
w 30 41 00
#			 DAC => 0 db gain right
w 30 42 00
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01
#			 De-pop, Power on = 800 ms, Step time = 4 ms
w 30 21 4e
#			 HPL and HPR powered up
w 30 1f c2
#			 LDAC routed to HPL, RDAC routed to HPR
w 30 23 44
#			 HPL unmute and gain 1db
w 30 28 0e
#			 HPR unmute and gain 1db
w 30 29 0e
#			 No attenuation on HP
w 30 24 00
w 30 25 00

#			 MIC BIAS = AVDD
w 30 2e 0b
#			 MICPGA P = MIC 10k
w 30 30 40
#			 MICPGA M - CM 10k
w 30 31 40
#			--------------------------------------------------------------- page 0 is selected
w 30 00 00
#			 select DAC DSP mode 11 & enable adaptive filter
w 30 3c 0b
w 30 00 08
w 30 01 04
w 30 00 00
#			 POWERUP DAC left and right channels (soft step disable)
w 30 3f d6
#			 UNMUTE DAC left and right channels
w 30 40 00
#			 POWERUP ADC channel
w 30 51 80
#			 UNMUTE ADC channel
w 30 52 00
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01
#			 Unmute Class-D Left
w 30 2a 1c
#			 Unmute Class-D Right
w 30 2b 1c
#			 Power-up Class-D drivers
w 30 20 c6

    Best regards,
    Luis Fernando Rodríguez S.

  • 0 in reply to Luis Fernando Rodriguez S.
    Intellectual 550 points

    Thank you Luis. 

    I did examine the script and then reviewed the info in the datasheet. I have a better understanding of the approach and in fact made quite a bit of progress. I ended up executing the AIC3110_init script in the CODEC folder and magically the amp started working. The script sets the PLL to MCLK, which confirms your comment about the EVM BCLK. 

    The remaining issues are why am I only getting one side of the audio (left side is fine but right side is not playing) and I am also getting some digital noise (constant popping).

    Any ideas on why that would be? Is there any input filtering of the digital signal (I2S) that may help with the digital noise? My signal is not as clean as the onboard generated signal from the USB.

    AIC3111_Init.txt 
    #			--------------------------------------------------------------- page 0 is selected 
w 30 00 00
#			 s/w reset
> 01
#			 PLL_clkin = MCLK,codec_clkin = PLL_CLK
w 30 04 03
#			 PLL Power up, P = 1, R = 1
> 91
#			 J = 8
> 08
#			 D = 0000, D(13:8) = 0
> 00
#			           D(7:0) = 0
> 00
#			 mode is i2s,wordlength is 16
w 30 1b 00
#			 NDAC is powered up and set to 4
w 30 0b 84
#			 MDAC is powered up and set to 4
> 84
w 30 12 84
> 84
#			 DOSR = 128, DOSR(9:8) = 0
> 00
#			             DOSR(7:0) = 128
> 80
#			 DAC => volume control thru pin disable 
w 30 74 00
#			 DAC => drc disable, th and hy
w 30 44 00
#			 DAC => 0 db gain left
w 30 41 00
#			 DAC => 0 db gain right
> 00
#			--------------------------------------------------------------- page 3 (touch screen) is selected
#			 SAR configuration
w 30 00 03
w 30 02 18
w 30 06 80
w 30 03 01
w 30 11 00
w 30 13 10
w 30 03 25
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01
#			 De-pop, Power on = 800 ms, Step time = 4 ms
w 30 21 4e
#			 HPL and HPR powered up
w 30 1f c2
#			 LDAC routed to HPL, RDAC routed to HPR
w 30 23 88
#			 HPL unmute and gain 1db
w 30 28 0e
#			 HPR unmute and gain 1db
> 0e
#			 No attenuation on HP
w 30 24 00
w 30 25 00

#			 MIC BIAS = AVDD
w 30 2e 0b
#			 MICPGA P = MIC 10k
w 30 30 40
#			 MICPGA M - CM 10k
> 40
#			--------------------------------------------------------------- page 0 is selected
w 30 00 00
#			 select DAC DSP mode 11 & enable adaptive filter
w 30 3c 0b
w 30 00 08
w 30 01 04
w 30 00 00
#			 POWERUP DAC left and right channels (soft step disable)
w 30 3f d6
#			 UNMUTE DAC left and right channels
> 00
#			 POWERUP ADC channel
w 30 51 80
#			 UNMUTE ADC channel
> 00

w 30  0 01

w 30 23 08
w 30 23 00
w 30 26 00
w 30 27 00

w 30 23 40
w 30 23 44
w 30 26 80
w 30 27 80

w 30 2a 0d
w 30 2b 0d

w 30 00 01
#			 Unmute Class-D Left
w 30 2a 1c
#			 Unmute Class-D Right
w 30 2b 1c
#			 Power-up Class-D drivers
w 30 20 c6
w 30 24 30
w 30 25 30

  • 0 in reply to John Heaton
    TI__Guru* 84915 points

    Hi, John,

    Do you still have noise issues even if the audio codec is powered down? I mean, is the digital noise coming from the digital clocks source or it is generated by the board?

    Additionally, I modified some code lines in the AIC3111 script. Could you try with it to verify if there are differences?

    8080.AIC3111_Init.txt 
    #			--------------------------------------------------------------- page 0 is selected 
w 30 00 00
#			 s/w reset
> 01
#			 PLL_clkin = MCLK,codec_clkin = PLL_CLK
w 30 04 03
#			 PLL Power up, P = 1, R = 1
> 91
#			 J = 8
> 08
#			 D = 0000, D(13:8) = 0
> 00
#			           D(7:0) = 0
> 00
#			 mode is i2s,wordlength is 16
w 30 1b 00
#			 NDAC is powered up and set to 4
w 30 0b 84
#			 MDAC is powered up and set to 4
> 84
w 30 12 84
> 84
#			 DOSR = 128, DOSR(9:8) = 0
> 00
#			             DOSR(7:0) = 128
> 80
#			 DAC => volume control thru pin disable 
w 30 74 00
#			 DAC => drc disable, th and hy
w 30 44 00
#			 DAC => 0 db gain left
w 30 41 00
#			 DAC => 0 db gain right
> 00
#			--------------------------------------------------------------- page 3 (touch screen) is selected
#			 SAR configuration
#w 30 00 03
#w 30 02 18
#w 30 06 80
#w 30 03 01
#w 30 11 00
#w 30 13 10
#w 30 03 25
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01
#			 De-pop, Power on = 800 ms, Step time = 4 ms
w 30 21 4e
#			 HPL and HPR powered up
w 30 1f c2
#			 LDAC routed to HPL, RDAC routed to HPR
w 30 23 88
#			 HPL unmute and gain 1db
w 30 28 0e
#			 HPR unmute and gain 1db
> 0e
#			 No attenuation on HP
w 30 24 00
w 30 25 00

#			 MIC BIAS = AVDD
w 30 2e 0b
#			 MICPGA P = MIC 10k
w 30 30 40
#			 MICPGA M - CM 10k
> 40
#			--------------------------------------------------------------- page 0 is selected
w 30 00 00
#			 select DAC DSP mode 11 & enable adaptive filter
w 30 3c 0b
w 30 00 08
w 30 01 04
w 30 00 00
#			 POWERUP DAC left and right channels (soft step disable)
w 30 3f d6
#			 UNMUTE DAC left and right channels
> 00
#			 POWERUP ADC channel
w 30 51 80
#			 UNMUTE ADC channel
> 00

w 30 00 01

w 30 23 44
w 30 26 80
w 30 27 80
#			 Unmute Class-D Left
w 30 2a 04
#			 Unmute Class-D Right
w 30 2b 04
#			 Power-up Class-D drivers
w 30 20 c6
w 30 24 80
w 30 25 80

    Best regards,
    Luis Fernando Rodríguez S.

  • 0 in reply to Luis Fernando Rodriguez S.
    Intellectual 550 points

    I did run the new script and it did behave differently. The main difference was that the volume of the output went down. Otherwise it still had noisy sound.

    The question about the noise is an interesting one.

    1. I measured the I2S signals from my controller with the scope, without hooking it up to CODEC and the signal is fantastic.

    2. When I just hook the three wires to the CODEC, then power/init,  the music is playing (still with some digital noise still). Both the controller and the CODEC are powered from the same PC. The signal is quite a bit noisier 

    3. If I run a GND between the two boards, the sound goes away.

  • 0 in reply to Luis Fernando Rodriguez S.
    Intellectual 550 points

    Additional info. I have attached 4 images from my scope. 1. Signals hooked to board by not powered. 2. Signals hooked to board and powered. 3 signals being transmitted and playing music. 4. signal unhooked from EVM and playing music.

    So I guess the question in, what is the recommended hookup procedure? I have a ground connecting these two boards but seems like there is something else going on here. My outputs are Bidirectional with weak pull downs and a 3.3 logic.

  • 0 in reply to John Heaton
    TI__Guru* 84915 points
    Hi, John,

    Could you provide details about how you disabled the I2S lines on the TLV320AIC3110EVM? The TAS1020b is the device that generates the I2S clocks and data on the EVM. Basically, it is used to as an USB to I2S interface. You should get clean I2S signals connecting the GND pin between both boards.

    Best regards,
    Luis Fernando Rodríguez S.
  • 0 in reply to Luis Fernando Rodriguez S.
    Intellectual 550 points

    HI Luis,

    I am pulling the I2S enable pin high (on the TAS1020b) with the logic rail. I checked it using the USB audio and when left alone, it outputs a nice I2S signal. WHen pulled high, it does go away. So that working great.

    On the noise issue... Not sure the digital noise I'm getting is being generated by the I2S signals. Even if I disconnect by audio source board, the EVM will emit a constant tapping out of the headphones. 

  • 0 in reply to John Heaton
    TI__Guru* 84915 points
    Hi, John,

    Do you get the same results using a different processing block? Then, have you verified if the I2S noise appears if the speaker driver is disabled? Additionally, could you try using a different I2S clocks source?

    Best regards,
    Luis Fernando Rodríguez S.
  • 0 in reply to Luis Fernando Rodriguez S.
    Intellectual 550 points

    Hi Luis,

    I'm having better success using another vendors CODEC's so I'm going to move on to one of those chips. Thanks for your feedback

    John