Hi,
the manual states a minimum PWM frequency of 192kHz. I was looking for the reason why, because I want a lower frequency in a multi phase interleaved design. So I found tACTIVITY DETECTOR 13.2µs. A lower frequency will probably switch the chip off and on. So my question: Is the timeout for each channel separate or are they coupled, so a 96kHz design with 90° phase would meet the 192kHz requirement? Another issue would be to adjust the minimum inductance to prevent the chip from burning in a short circuit condition. My intention is to run four phases with an edge update rate of 768kHz resulting in a 96kHz PWM frequency each.
