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DIT4096: Asking for the DIT4096 Setting and output AES issues

SHH
Mastermind 30746 points
Part Number: DIT4096
Other Parts Discussed in Thread: PCM4201, PCM4201EVM

Hi Team,
Customer uses DIT4096 and has some issues.
Thus, we used the PCM4201 EVM's DIT4096 for verification.

schematic www.ti.com/.../sbau108

I jumped the RN4 and RN3 resistor and jump the MCLK/SCLK/SYNC/SDATA from PCM4201 J3 to DIT4096.
Here are the 24bit left-justified audio source that send from audio precision.
MCLK

SCLK

SYNC

SYNC ZOOM In

SDATA

Here are the Audio precision setting and unbalanced AES measurement result.
the resulted is not decode well.


Can you please duplicate this case and advise how to set the audio precision to get the correctly decode result?


BR,
SHH

  • 0
    TI__Expert 5645 points
    Hi SHH,
    As far as the PCM4201 EVM goes, to get the right output of the DIT4096, we will have to make sure the DIT configuration [SW1-DIT] & DIT Master Clock Configuration [SW1-DITCLK] elements are configured properly. The transmitter master clock rate selection must match the system clock rate selection for the PCM4201.

    I will attempt to recreate the setup using PCM4201 EVM here in our lab this week, and will let you know additional details. I am not sure if this post is related to other question you posted on DIT4096...If so, we can address both in coming days once you provide the additional details.

    Best regards,
    Ravi
  • 0 in reply to Ravi Patil
    TI__Mastermind 30746 points
    Hi Ravi,
    Thanks for reply.
    Could you please let me know why DIT4096 only support I2S 16bit format?
    register 0x03 bit3 and bit 2 can set 24bit, right?


    BR,
    SHH
  • 0 in reply to Ravi Patil
    TI__Mastermind 30746 points
    Hi Ravi,
    two post are for the same project.

    SW1-DIT(SW1 pin12): I already removed RN4. For for SW1-DIT to U6 pin19 is no impact. The U7 DIT4096 pin 15 RST pin is high. So DIT4096 is not is reset mode.

    SW1-DITCLK(SW1 pin11): U7 DIT4096 pin4CLK1/ pin5 CLK0 are low/ high/ the the MSTART frequency is 256*fs.

    Please advise me how to fix the issues.


    BR,
    SHH
  • 0 in reply to SHH
    TI__Mastermind 30746 points

    Hi Ravi,

    I found the way how to set the DIT4096 workable on AP setting. So the HW mode on 24bit left-justified DIT4096 stereo AES output is ok on PCM4201EVM.

    BR,

    SHH

  • 0 in reply to SHH
    TI__Expert 5645 points

    Hi SHH,

    DIT4096 can support 16/18/20 and 24bits and it's a function of how you set the WLEN[1:0] are configured as highlighted below. Please use the JUS and DELAY bits in Register 0x03 to choose the appropriate format depending on what the host processor can handle.

    Best regards,

    Ravi