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TPA3255: No Output TPA3255 BTL

JULIAN DE ROSS
Intellectual 450 points
Part Number: TPA3255

Hi Team

I've recently been trying to implement a BTL mode TPA3255 power amplifier with 2 outputs (BTL).  I don't seem to be able to achieve any  output. 

INPUTS are fed in as 'normal' and inverted for In A and In B (same for C and D) (differential).

RESET ... my reset cct is pretty primal.. It has a slow rise time of a 100mS +...   I cannot find any data on max min rise times for the RESET line....

OCA   My resistor value is just under the preferred minimum of 22k.. (Mine is 20k, but I can change this)

FAULT line was not pulled high at first, but I made some hardware change to enable that (on the pcb) i.e.. a resistor to 3.3v (which I also had to add as the PCB/SCHEM did not have a 3.3v source)

CLIP and FLT were connected together as a sort of 'OR' cct.

My schematic is included (part)

Any suggestions would be appreciated, specially about connecting FLT to clip and FLT as an 'or'....

Cheers all.

Julian

  • 0
    TI__Mastermind 24000 points
    Hi Julian,

    While I look through the schematic, are you seeing the device at least start up and the FETs switching or is there no switching on the outputs?

    Regards,
    Robert Clifton
  • 0 in reply to Robert Clifton56
    Intellectual 450 points
    Hi Rob
    *nothing*... I get zero anything at the outputs. I am only running 30v PVDD (just to test it)... but I have a very slow Reset rise time... does this device need a nice clean fast edge on the reset ? I've developed a new board with some extra bits for a decent reset, but that wont be ready for a while. (couple of weeks). I've tried 2 devices. The first one seemed to produce the waveform I attach... suggesting some kind of overcurrent event?... but I've checked for any contact between output pins.

    I'm not sure if my rather limited FLT handling cct is having any effect. I do not have any connectivity between the FLT o/p and RESET, but the lit seems to suggest that after a FLT event/signal, a reset is needed ? I have FLT connected to CLP_OTW .. intending for either to be an 'OR' output.
    In my new circuit I've separated these and provided what I think is better hardware to manage them. At the moment I guess I would feel better if you, or any other expert can see problems with how I've wired it up as per the cct.. So, would CLIP_OTW and FLT being connected together cause some complication/zero output?
    OCA is only looking at 20K in my circuit for max current.. I'm shy of the min 22k by 2k... could this be a source of the problem?

    Cheers
    Julian
  • 0 in reply to JULIAN DE ROSS
    TI__Mastermind 24000 points
    Hi Julian,

    Thank you for mentioning that you tied the CLIP_OTW and Fault pins together as I almost missed that! If possible I would recommend disconnecting these two on the board you have built and see if that helps (though I know that is likely difficult to do.

    You are correct. After a fault condition the device needs to go into reset to clear it. But not for a CLIP_OTW event.

    Just to re-verify I see in the schematic the resistor values of your Frequency Adjust pin and Overcurrent Adjust pin being flipped with each other. Not sure if you had already noticed that and switched the values out.

    Regards,
    Robert Clifton
  • 0 in reply to Robert Clifton56
    Intellectual 450 points

    Hi Rob

    I think I was just a bit 'sloppy' with the values.. Fadj and OCA... I have changed/corrected them in my new board which will arrive any day now. 
    I might try to give separating them a burl today... might be difficult but not impossible. 
    Clip and Fault are separated in that new board.
    Thanks for being a sounding board. :)   it helps. 
    I'm so glad you enjoy what you do....it's something I also have, but for many that life situation is very illusive. 
    Cheers
    Julian
  • 0 in reply to JULIAN DE ROSS
    TI__Mastermind 24000 points
    Hi Julian,

    Thank you for your kind words! It means a lot.

    Let me know if you have any other issues in your new board revision/ solve the issue you were seeing on this one.

    Best Regards,
    Robert Clifton
  • 0 in reply to Robert Clifton56
    Intellectual 450 points

    Hi Rob

    indeed I will pass on any further issues.
    I've got one general question in regard to the Output Filter caps.  (EVM unit)
    I note the 1uf caps at the o/p of the inductor are 250v but the .001's in parallel are only 100v

    This is where I prove that I am but a humble technician (well adjusted) rather than an Engineer (well designed )  :)

    I am not sure why the much larger voltage rating for the 1uf is needed but not for the .001's.  (BTL mode without the Single Ended Cap  c21 in circuit of course)
    Can you offer a rationale for this?

    Regards

    Julian

  • 0 in reply to JULIAN DE ROSS
    TI__Mastermind 24000 points
    Hi Julian,

    I would have never been able to guess that you were a technician and not an engineer to be honest. We get questions like this all of the time.

    250V was a bit extreme for the film capacitor. We have just found that those film caps are convenient to showcase good performance out of amplifier and are easy for customer evaluation (since they are through hole).

    Regards,
    Robert Clifton
  • 0 in reply to Robert Clifton56
    Intellectual 450 points
    Cheers mate...and thanks!