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TAS5162: 250mv GVDD supply leakage on PVDD rail

Part Number: TAS5162
Other Parts Discussed in Thread: TAS5518

Hi, i'm working on a TAS5165DKD6EVM and measure a 250mv dc voltage coming from GVDD on the PVDD rail supply. In other way, i get sound on the outputs when PVDD is set at 0v. Is it a normal operation mode ?

TAS5162 are use in BTL mode.

Thanks

  • Hi Arnaud,

    Can you share some more details about your system configuration? Also when you have PVDD off do you also have GVDD off as well?

    You shouldn't be getting any sound out of the amplifier if the device is powered down.

    Regards,
    Robert Clifton
  • The TAS5165DKD6EVM came new from Newark-Element14. This board (TAS5518 + 3x TS5162) is use in 6x BTL channels configuration. GVDD voltage is +15Vdc. PVDD is 0 to +35Vdc adjustable (use for volume level adjustment).
    When GVDD is off and PVDD is off, no sound at all (of course)
    When GVDD is on and PVDD is disconnected, 250mv dc measurement on PVDD pin and sound present on 6 speakers outputs at low constant level
    When GVDD is on and PVDD is off, 250mv dc measurement on PVDD pin and sound present on 6 speakers outputs at low constant level
    When GVDD is on and PVDD is set to 0Vdc, 250mv dc measurement on PVDD pin and sound present on 6 speakers outputs at low constant level
    When GVDD is on and PVDD is set to more than 250mv, sound increase with PVDD on 6 speakers outputs like a normal working statement.

    There is no PVDD leakage to GVDD, only GVDD to PVDD

    Is it a normal to have 250mV of GVDD on PVDD or is it an EVM board issue ?
    Thanks
  • Hi Arnaud,

    This would make sense as the GVDD supplies the gate voltage circuitry, including the bootstrap. Is there any reason why you are wanting to turn PVDD supplies off but keep the GVDD supplies on?

    Regards,
    Robert Clifton
  • Hi Robert, thanks for your answer.

    My project is to adjust the amplifier output level with the PVDD voltage because i don't want a digital attenuation on the signal flow. That's why i choose the TAS5162  (seen in datasheet: TAS5162 accept 0 to 50v PVDD). 

    But theses 250mv bother me... i'll have to do add a threshold gate to digital mute audio when PVDD is at 0v if i want no sound at the output

    In TAS5162 datasheet curves, 0v PVDD give 0W power output and no mention of 250mV GVDD leakage on PVDD.

    All my apologies for my poor english langage, i'm a French guy

  • Hi Arnaud,

    I'm assuming you need to have a PWM input device? We do have I2S digital inputs that you can send I2C code to adjust the gain of the system rather than adjusting the PVDD voltage. But you might be too far along to switch now and/or your system needs a PWM inputs.

    Since this happens only at PVDD = 0V, you could just set the device into reset mode by driving the reset pins low and see if that removes the noise you are seeing.

    Your English is actually not that bad!

    Best Regards,
    Robert Clifton
  • Hi Robert, there is a TAS5118 in charge of i2s to pwm conversion before TAS5162 so yes i could do a digital mute but i don't want that.
    What about adding a Schottly (like MBR1100) diode between each TAS5162 output and 10uH inductor ? That would cancel my 250mv GVDD leakage on output, isn't it ?
    Best regards

    Arnaud
  • Hi Arnaud,

    You could try having a snubber network on the output to see if that will work.

    Regards,
    Robert Clifton