This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPA3138D2: Can you recommend to tie control pins to GVDD over registers?

Part Number: TPA3138D2
Other Parts Discussed in Thread: TPA3144D2,

Hello,

 My customer is using TPA3144D2 for previous model.  TPA3144D2 typical application mentioned that control pins tie to GVDD. 

but TPA3138D2 typical application mentioned that control pins ( GAIN_SEL,MODE_SEL and FAULT ) tie to PVCC.

Do you recommend to tie TPA3138D2 control pins to GVDD?

Regards,

  • Hello Ryoji,

    For the TPA3138D2 we not recommend tying the control pins to GVDD. We recommend the pull up being tied to PVCC, however if you were to drive it externally it would need to meet recommended operating conditions in section 7.3 in regards to the high-level(2V threshold) and low level input voltage range and the maximum input voltage would need to meet the spec in the datasheet.

    Best Regards,

    Luis

  • Hello Luis,

     Thank you for your support.

    Customer is thinking that PVCC is making voltage drop when volume is increasing and changing. so PVCC is not stable for control pins even if PVCC has UVP.

    therefore Customer is thinking that GVDD is better than PVCC to stable voltage.  

    What do you think about above customer's opinion?

    Regards,

  • Hello Ryoji,

        It is proposed to follow datasheet and use PVDD power rail to do signal control. as Gain (20dB, 26dB) and mode (BD/1SPW) only two options, likely only low/high control. it should be enough margin for variation. 

    regards

    Linda

  • Hello Xiaolin,

     Thank you for your support.

    the customer understood TI's opinion based on your answer. 

    but the customer has concern to use PVCC for control pins.  

    Can you make comment to following items?

    Customer's concern are

    1.  PVCC has steep variation.  If PVCC was down to under VIH very very shortly.  UVP will be work?   Control pins will be changed without UVP?

    2. PVCC has noise due to load fluctuation is heavy.   What do you think about noise perspective for control pins?

    3. Can you explain why GVDD is not recommendation for control pins?

    Regards,

  • Hello Ryoji,

    I will check with the team internally to provide more information regarding your questions. Thank you for your time and consideration.

    Best regards,

    Luis

  • Hello Ryoji,

    To answer your question

    1. UVP is a level trigger so if goes below the UVP threshold, UVP would activate and the device would be in shutdown. the control pins Vih is minimum 2V which is below both UVP threshold modes, so the device would be in shutdown. If you expect this kind of variation on PVCC it would be remedied with power supply filters.
    2. The noise on PVCC shouldn't have any major affect because the Vih for these control pins is 2V. If the PVCC was fluctuating so much that it went below 2V, the device would be in shutdown already due to UVP
    3. One of the reasons is that if the control pins were interfaced with a microcontroller externally we couldn't guarantee that voltage reference of the external device would match with the internally generated GVDD voltage so we recommend using PVDD since it's an externally controlled voltage.

    Best Regards,

    Luis

  • Hello Luis,

     Thank you for the answer.

    If control pins were not interfaced to other device such as MCU. 

    Control pins can be tied to GVDD over registers?   Do you have any problem with this condition?

    Regards,

  • I will get more information from the Design team to see what possible effects this could have.

    Best regards,

    Luis

  • Hello Ryoji

    Why we recommend to connect it to PVCC is because GVDD is generated by a LDO that uses PVCC. So at the start up ,the LDO voltage is not ready.

    So if we want to tie high, you might encounter problems tying it to GVDD because it might be low at start up.

    Best Regards,

    Luis