Other Parts Discussed in Thread: TAS2110
Hello TI Team,
I am using the nrf52840 development kit to feed i2s signals to TAS2110 EVM externally.
I like to provide i2c signals also externally for other configurations of TAS2110 EVM.
When I looked at the data she's I am having doubts regarding SBCLK settings.
1)SBCLK mentioned in datasheet is the master clock or serial clock for I2S from the nrf52840 chip?
2)while connecting external i2s signals from the nrf52840 chip I should remove the jumpers j4,j3,j5 and connect those to sbck ,fsync,sdin
I should connect serial clock, frame clock, and data out from nrf52840 to j4,j3, and j5 respectively?
3) do I need to connect an external pull up while using TAS2110 EVM for connecting an external i2c from the nrf52840 chip?
4) I am using the sample rate as 44.1Khz and Master clock/ Frame synch clock = 64. but as per your TAS2110 datasheet when using sample rate 44.1Khz and SBCK/FSYNCH = 2.8224 MHz.
nrf52840 chip doesn't have such configuration in I2S where serial clock is 2.8Mhz when the ratio is 64.
5)nrf52840 chip cant provide exact 44.1Khz sample rate due to its error factor and sample rate will be 45454.5 Hz does this effect TAS2110 performance which leads to clock error?
6)Kindly provide me a sample code if available where you have interfaced TAS2110 EVM with any of the chip providing i2s and i2c externally..
Please help me figure out a solution to these issues and correct me if my understanding is wrong.
I choose TAS2110 EVM due to its accuracy and efficiency but now I am in trouble.