Lets start over with the right part number in the question
Reviewing this device for some audio work, the front page noise plot is ok, kind of a high noise corner but good for JFET,
Here is that from the front page, a little over 30nV at 10Hz,
The TINA reference design file includes a number of the char curves, here that is for Aol and noise (a side point, the Aol curve seems to have shift x scales for the mag and phase, hard to read - also, the stated Cload is perplexing - just trying to expand the bandwidth, handling typ parasitic, what?)
But the noise seems much higher in sim, looking 10Hz here again, looks like 60nV , corner is much higher in the model - running the sim for that model shows 61nV at 10Hz - so which is right, the front page plot or the sim model, makes a difference for those integrated noise numbers in audio,
Michael Steffes
