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PCM1863: I2C Bus Write is not getting ACK

Prabhakar A
Intellectual 260 points
Part Number: PCM1863
Other Parts Discussed in Thread: HDC1080, PCM1861

Hi Team,

We are using PCM1863 part in our custom linux board for collecting audio samples from stereo analog mics. 

The main processor is based on ARM Cortex A7 running linux. We have custom I2C linux driver to read and write the I2C slaves. In our circuit, the I2C bus is having two slave devices at following I2C adresses:
Slave-1 @ slaveadr = 0x40 (HDC1080 device)
Slave-2 @ slaveadr = 0x4A (PCM1863 device)

We see that the HDC1080 I2C read and write works fine. But the PCM1863 I2C slave address write is NOT getting ACK. As HDC1080 is working, we feel there is no signals issue in the I2C bus. 

We have attached the PCM1863 schematics circuit for reference.
in this circuit,
1)  We have NOT used crystal oscillator for PCM1863.
2)  The SCKI is driven from main processor and in the current set-up SCKI clock is NOT fed yet. we are just testing I2C interface now. In datasheet, we see that SCKI is not required for I2C bus operation. 
3) The I2C SCL is currently at 100KHz




For PCM1863 I2C slave address write, we are NOT getting ACK for Slave Address cycle itself. i.e) The slave address is not recognised by PCM1863 device and not acknowledging. 

We have attached the I2C Slave address write cycle CRO waveform for reference.

 



1) Please help us what could be the issue with PCM1863?. 
2) Is the PCM1863 circuit fine for I2C bus?.
3) Do we need to drive SCKI of PCM1863 with clock frequency?.

Best regards.
Prabhakar

  • 0
    TI__Guru 62905 points

    Hello,

    The address and schematic look correct and you do not need to have the main clocks active to communicate with the device over I2C.  

    Could you share the full frame including the stop condition for the I2C transaction?  The address and schematic look proper and should not be impacting the device's ability to communicate.  Are all of the power-rails up and stable when this transaction takes place?

  • 0 in reply to Collin Wells
    Intellectual 260 points

    Hi Collln,

    Thanks for update. 

    Below is the full I2C write frame. The frame is getting stoppped by processor at slave address cycle itself as NO ACK is received from PCM1863. 



    The power-rails: AVDD, DVDD and IOVDD are stable during the I2C write frame. I have attached below images for your reference.

    Now we are clueless where could be issue. 

    Best regards, Prabhakar

  • 0 in reply to Prabhakar A
    Intellectual 260 points

    Hi Collin,

    We found that there is mistake in assembly and PCM1861 is mounted in place of PCM1863. Its our assembly issue. 

    Sorry, we will mount PCM1863 and hopefully I2C will work afterwards.

    Best regards, Prabhakar

  • 0 in reply to Prabhakar A
    TI__Guru 62905 points

    Makes sense.  Thank you for the updates and great work on the debug!