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Hi team,
Can you please review this schematic (will send internally)?
This is for an AK5522 replacement.
They are using a Master clock of 12.2888Mhz, and they are going to use 16KHz as the sampling rate, which means they will need a clock ratio of 768. This should be okay because it's above the min Required Clock ratio of 128, am I right?
They are putting in 4V RMS differential audio input at the analog end, left channel only. The right channel will be disconnected.
Please take a look and let me know if those connections all make sense or if there's something that should be changed to improve the design.
Thank you!
Hi Lauren,
I can certainly review a schematic. Note that if the autoclock feature is used it's not actually necessary to provide an MCLK/SCKI as the device can internally generate one.
Best,
Zak