TPA6166A2: Need Assert TPA6166 IRQ# on Headsets Insertion and Latch But Masked Headphones

Wayne Chen (ex FAE)

Part Number: TPA6166A2

Hi Sirs,

As title, would you pls advise CFG to bring up the TPA6166 to assert IRQ# on headsets insertion event but masked headphones event as the chart below?

With Current configuration (0x04=0x0c). I got IRQ# pulses (status changes and status reads) on both of headsets and headphones insertion and removal events.
How can we keep the IRQ# asserted when a mic was inserted, keeps IRQ# asserted, and de-asserts IRQ# when a mic was removed?

------------------------------------------------------------------------
#op i2c Addr Data Comment
w 80 1E 19 #Enable Registers 3
w 80 04 0C #Interrupt Mask Register 1
w 80 05 F4 #Interrupt Mask Register 2
w 80 07 B9 #Left Headphone Volume Register
w 80 08 79 #Right Headphone Volume Register
w 80 09 47 #Microphone/Ground Control
w 80 1A 95 #Jack Detect AC Test Settings
w 80 1E 01 #semi auto mode
w 80 1D 80 #Enable Registers 2
------------------------------------------------------------------------

Thank you and Best regards,

Wayne Chen
12/10/2020

over 3 years ago

0 Luis Fernando Rodriguez S. over 3 years ago

TI__Guru* 84915 points

Hi, Wayne,

Unfortunately, it seems that the IRQ pin cannot be kept asserted in the way you are looking for. The IRQ pin is enabled (low active) and it remains active until the associated registers are read. So, even if the jack is removed, you will need to read the register to place the IRQ pin high state again.

Please let me know if you have additional questions or comments.

Best regards,
Luis Fernando Rodríguez S.

0 Wayne Chen (ex FAE) over 3 years ago in reply to Luis Fernando Rodriguez S.

Guru 15950 points

Hello Luis,

Thanks for your confirmation. Would you pls assist us to rework the CFG (0x04) to mask the headphones event as the timing sequence?
I found the TPA6166 with 0x04 = 0x0c keeps sending IRQ# with headphones (no mic) was inserted.

Thank you and Best regards,

Wayne Chen
12/11/2020

0 Luis Fernando Rodriguez S. over 3 years ago in reply to Wayne Chen (ex FAE)

TI__Guru* 84915 points

Hi, Wayne,

Have you tried to configure register 0x04 as 0x08 and register 0x05 as 0x00 just to enable the IRQ pin when microphone is inserted?

Best regards,
Luis Fernando Rodríguez S.

0 Wayne Chen (ex FAE) over 3 years ago in reply to Luis Fernando Rodriguez S.

Guru 15950 points

Hello Luis,

Thank you for your advise. It works on the EVM. Here are the waveforms with the following configurations:

#op i2c Addr Data Comment
w 80 1E 19 #Enable Registers 3
w 80 04 08 #Interrupt Mask Register 1
w 80 05 00 #Interrupt Mask Register 2
w 80 07 B9 #Left Headphone Volume Register
w 80 08 79 #Right Headphone Volume Register
w 80 09 47 #Microphone/Ground Control
w 80 12 01 #Reserved Registers
w 80 13 45 #Reserved Registers
w 80 1A 95 #Jack Detect AC Test Settings
w 80 1E 01 #semi auto mode
w 80 1D 80 #Enable Registers 2

Thank you and Best regards,

Wayne Chen
12/13/2020

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TPA6166A2: Need Assert TPA6166 IRQ# on Headsets Insertion and Latch But Masked Headphones