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TAS5753MD: Need help with default stereo BTL configuration

Prodigy 20 points

Replies: 3

Views: 505

Part Number: TAS5753MD

Hi,

I have a custom TAS5753MD board that I am trying to configure for standard stereo BTL mode, no equalizer.  Unfortunately, I don't have the PPC motherboard or eval module, and  Purepath console 3 does not allow generation of configuration files without a connected  motherboard/evalboard.

The source is 3-wire I2S, 16bit, fs=44.1KHz, sclk = 32*fs. I have verified the i2s data with a logic analyzer and am able to generate noise-free stereo audio with a PCM5102 DAC.

PVDD is ~12V switched on 100mSec after the 3.3V supply.  The TAS5753MD 1mSec reset pulse is on power up, but the function init_amp() is called after the i2s data is being generated. I have disabled the equalizer.

However, I do not get any audio output. As per my understanding, the TAS5753MD will automatically generate MCLK if it is not present. I have tried both grounding MCLK and connecting MCLK to SCLK.

Here are the register settings that I read back from the uart console after configuration. I would appreciate it if you see a problem or if there are any additional registers that must be programmed for stereo BTL without headphone driver.

TAS : Bank Switch Control = 0F 70 80 80
TAS : Serial Data Interface = 0x03
TAS : Clock Control = 0x6C
TAS : PWM Shutdown Group = 0x30
TAS : Soft Mute = 0x00
TAS : Input Mux = 00 01 77 72
TAS : PWM Mux = 01 02 13 45
TAS : Volume Config = 0x90
TAS : Master Vol = 00 a0
TAS : Chan1 Vol = 00 a0
TAS : Chan2 Vol = 00 a0
TAS : Chan3 Vol = 00 a0
TAS : Error Status = 0x00


----------------------------------------------------------------------- configuration code ------------------------------------- #define REG_CLOCK_CTRL 0x00 #define REG_DEVICE_ID 0x01 #define REG_ERROR_STATUS 0x02 #define REG_SYS_CTRL_1 0x03 #define REG_SDATA_INTERFACE 0x04 #define REG_SYS_CTRL_2 0x05 #define REG_SOFT_MUTE 0x06 #define REG_MASTER_VOL 0x07 #define REG_CHAN1_VOL 0x08 #define REG_CHAN2_VOL 0x09 #define REG_CHAN3_VOL 0x0A #define REG_VOL_CFG 0x0E #define REG_PWM_SHUTDOWN 0x19 #define REG_OSC_TRIM 0x1B #define REG_INPUT_MUX 0x20 #define REG_PWM_MUX 0x25 #define REG_BANK_SW_CTRL 0x50 static void init_amp(void) { uint8_t regbuf[4]; SCCB_Write(i2cSlaveAddr, REG_OSC_TRIM, 0x00); delay(500); uint8_t osctrim = SCCB_Read(i2cSlaveAddr, REG_OSC_TRIM); printf("\r\nTAS : Osc Trim = 0x%02X\r\n", osctrim); SCCB_Write(i2cSlaveAddr, REG_SDATA_INTERFACE, 0x03); // i2s 16bit SCCB_ReadBytes(i2cSlaveAddr, REG_BANK_SW_CTRL, regbuf, 4); //printf("TAS : Bank Switch Control = %02X %02x %02x %02X\r\n", regbuf[0],regbuf[1],regbuf[2],regbuf[3] ); uint8_t bankswctrl[] = {REG_BANK_SW_CTRL, regbuf[0], regbuf[1], regbuf[2], regbuf[3] | 0x80}; // disable equalizer SCCB_WriteBytes(i2cSlaveAddr, bankswctrl, 5); SCCB_ReadBytes(i2cSlaveAddr, REG_BANK_SW_CTRL, regbuf, 4); printf("TAS : Bank Switch Control = %02X %02x %02x %02X\r\n", regbuf[0],regbuf[1],regbuf[2],regbuf[3] ); uint8_t sdic = SCCB_Read(i2cSlaveAddr, REG_SDATA_INTERFACE); printf("TAS : Serial Data Interface = 0x%02X\r\n",sdic); uint8_t ccr = SCCB_Read(i2cSlaveAddr, REG_CLOCK_CTRL); printf("TAS : Clock Control = 0x%02X\r\n",ccr); uint8_t pwmshdn = SCCB_Read(i2cSlaveAddr, REG_PWM_SHUTDOWN); printf("TAS : PWM Shutdown Group = 0x%02X\r\n", pwmshdn); uint8_t softmute = SCCB_Read(i2cSlaveAddr, REG_SOFT_MUTE); printf("TAS : Soft Mute = 0x%02X\r\n", softmute); SCCB_ReadBytes(i2cSlaveAddr, REG_INPUT_MUX, regbuf, 4); printf("TAS : Input Mux = %02X %02x %02x %02X\r\n", regbuf[0],regbuf[1],regbuf[2],regbuf[3] ); SCCB_ReadBytes(i2cSlaveAddr, REG_PWM_MUX, regbuf, 4); printf("TAS : PWM Mux = %02X %02x %02x %02X\r\n", regbuf[0],regbuf[1],regbuf[2],regbuf[3] ); SCCB_Write(i2cSlaveAddr, REG_VOL_CFG, 0x90); // set AGL from registers 0x08, 0x09 uint8_t volcfg = SCCB_Read(i2cSlaveAddr, REG_VOL_CFG); printf("TAS : Volume Config = 0x%02X\r\n", volcfg); SCCB_Write(i2cSlaveAddr, REG_SYS_CTRL_2, 0x00); // exit shutdown delay(100); uint8_t mastervol[] = {REG_MASTER_VOL, 0x00, 0xA0}; SCCB_WriteBytes(i2cSlaveAddr, mastervol, 3); uint8_t chan1vol[] = {REG_CHAN1_VOL, 0x00, 0xA0}; SCCB_WriteBytes(i2cSlaveAddr, chan1vol, 3); uint8_t chan2vol[] = {REG_CHAN2_VOL, 0x00, 0xA0}; SCCB_WriteBytes(i2cSlaveAddr, chan2vol, 3); uint8_t chan3vol[] = {REG_CHAN3_VOL, 0x00, 0xA0}; SCCB_WriteBytes(i2cSlaveAddr, chan3vol, 3); SCCB_ReadBytes(i2cSlaveAddr, REG_MASTER_VOL, regbuf, 2); printf("TAS : Master Vol = %02X %02x\r\n", regbuf[0],regbuf[1] ); SCCB_ReadBytes(i2cSlaveAddr, REG_CHAN1_VOL, regbuf, 2); printf("TAS : Chan1 Vol = %02X %02x\r\n", regbuf[0],regbuf[1] ); SCCB_ReadBytes(i2cSlaveAddr, REG_CHAN2_VOL, regbuf, 2); printf("TAS : Chan2 Vol = %02X %02x\r\n", regbuf[0],regbuf[1] ); SCCB_ReadBytes(i2cSlaveAddr, REG_CHAN3_VOL, regbuf, 2); printf("TAS : Chan3 Vol = %02X %02x\r\n", regbuf[0],regbuf[1] ); SCCB_Write(i2cSlaveAddr, REG_ERROR_STATUS, 0x00); // clear errors delay(100); uint8_t errors = SCCB_Read(i2cSlaveAddr, REG_ERROR_STATUS); printf("TAS : Error Status = 0x%02X\r\n\r\n",errors); }

  • Hello Hari, Shawn can take a further look at your question, but are you getting a specific clock error, and if so what is it? MCLK and SCLK can be tied together as long as they have a frequency of 64×Fs when the sample rate is 44.1KHz or 48KHz. If your customer wants to tie MCLK and SCLK, the frequency of these clocks should be 3.072MHz (64×Fs). Thanks, Jeff
  • Hi Hari,

    As Jeff mentioned above, MCLK input is required for TAS5753MD. If it's not available, you could also use SCLK for it. But please refer to be noted that MCLK can only be 64/128/192/256*fs, so the lowest MCLK is 64*fs. In you application, it' 32*fs. Could you please try with 64*44.1kHz I2S input?

    Best regards,

    Shawn Zheng

  • In reply to Shawn Zheng:

    Thanks Shawn, Jeff.  Changing the source bit clk to 64*fs worked.

    But with a bit clk of 32*fs,  I wasn't getting any errors after clearing the error status register and waiting for 100msecs. And on reading the clock control register,  MCLK was set to 256*fs. This was with both MCLK grounded and MCLK connected to SCLK.   So I was convinced that i had some register setup error.

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