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TLV320AIC3101: Tlv320aic3101 has no output when passing through DAC

Part Number: TLV320AIC3101

Output from lineLP to Lpga to earphone is ok, lineLP to Lpga to Ladc is ok, but from Dout to Ldac to earphone is silent,Din and Dout are connected

aic3101Write(0,0x02,0x44);
aic3101Write(0,0x03,0x91);/*pll enabled q=2,p=1*/
aic3101Write(0,0x04,0x20); /*j=8*/
aic3101Write(0,0x05,0x00);
aic3101Write(0,0x06,0x00);/*D*/
aic3101Write(0,0x0b,0x01);/*R=1*/
aic3101Write(0,0x65,0x01);/*CODEC_CLKIN uses CLKDIV_OUT*/

aic3101Write(0,0x08,0xD0);
aic3101Write(0,0x09,0x06);
aic3101Write(0,0x2a,0x94);
aic3101Write(0,0x19,0x00);
aic3101Write(0,0x13,0x06);
aic3101Write(0,0x18,0x00);
aic3101Write(0,0x16,0x04);
aic3101Write(0,0x0f,0x50);
aic3101Write(0,0x10,0x50);
aic3101Write(0,0x28,0x80);
aic3101Write(0,0x0e,0x88);
aic3101Write(0,0x07,0x0a);
aic3101Write(0,0x40,0x80);

aic3101Write(0,0x25,0xc0);
aic3101Write(0,0x26,0x06);
aic3101Write(0,0x2c,0x00);
aic3101Write(0,0x2b,0x00);

aic3101Write(0,0x41,0x79);
aic3101Write(0,0x33,0x79);
#if 1
aic3101Write(0,0x3f,0x80);/*PGA_R is routed to HPROUT.*/
aic3101Write(0,0x2e,0x80);/*PGA_L is routed to HPLOUT.*/
#endif

  • Hello,

    Some quick questions before I look into the register settings more in depth:

    1. What is the input clock frequency you are using? What is the sample rate?

    2. Is the PLL being used? i see that it is enabled but in register 0x65, the CLKDIV_OUT is being used instead of PLLDIV_OUT.

    3. Is this on a custom board or an EVM? If on an EVM, there are other steps to take when using DOUT to DIN loopback.

    Regards,

    Aaron

  • Hello there,
    1. The input clock frequency is 12.288M and the sampling rate is 16K
    2. Using pll, I don't know if it needs to be turned on, the main control chip has no extra clock pins for tlv320aic3101 input, so it is configured in the main mode
    3. Using a traditional development board, DIN and DOUT are directly connected together
    The current progress is to be able to use dac output, but it must be under the premise of reg0x0c=0x00, otherwise the output waveform is a high-level straight line, I want to know why
    thank you very much!
    Chen

  • Hello Chen,

    The PLL is not needed and therefore should be disabled. That should not be the cause of the behavior you are seeing though. 

    Can you please share a schematic? I would also like to know what kind of input is used? Is there a mic connected or is a sine wave being fed into the device and if so, at what frequency?

    Regards,

    Aaron