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LMK04832: SYSREF or SCLK outputs

new2day
Expert 1940 points
Part Number: LMK04832
Other Parts Discussed in Thread: LMX2594

Hi,

I could yo get SYSREF output from CLKout1/3/5/7 etc. 

I've attached register set-up for CLKout1_1_2_3_5 in distribution mode from CKJin1. 

Thank you.

  • 0
    TI__Mastermind 33430 points

    Hi new2day,

    I'm not seeing your register setup attached. Nevertheless, a few things should be set to ensure SYSREF output:

    • SYNC_EN=1
    • SYSREF_PD=0
    • SYNC_DISSYSREF=1
    • SYSREF_MUX=2 or 3, for pulser or continuous respectively. I recommend 3 for continuous for debugging
    • Either SYSREF_GBL_PD=0, or SYSREF_GBL_PD=1 and SCLKX_Y_DIS_MODE=0 (active)

    For each clock output on which SYSREF is used:

    • SCLKX_Y_PD=0
    • CLKoutY_SRC_MUX=1 (for SYSREF)

    Please confirm that all of these criteria have been fulfilled.

    Regards,

    Derek Payne

  • 0 in reply to Derek Payne
    Expert 1940 points

    Hi Derek,

    I'll double check those settings. In meantime, the registers file is attached. Thank you.

    Fullscreen 8831.lmk04832_default2distribution_0_1_2_3_5c.txt Download 
    R0 (INIT)	0x000090
R0	0x000010
R2	0x000200
R3	0x000306
R4	0x0004D1
R5	0x000563
R6	0x000650
R12	0x000C51
R13	0x000D04
R256	0x010004
R257	0x01010A
R258	0x010200
R259	0x010340
R260	0x010420
R261	0x010500
R262	0x010601
R263	0x010765
R264	0x010804
R265	0x01090A
R266	0x010A00
R267	0x010B40
R268	0x010C20
R269	0x010D00
R270	0x010E01
R271	0x010F65
R272	0x011008
R273	0x01110A
R274	0x011200
R275	0x011340
R276	0x011420
R277	0x011500
R278	0x011601
R279	0x011760
R280	0x011808
R281	0x01190A
R282	0x011A00
R283	0x011B40
R284	0x011C10
R285	0x011D00
R286	0x011E01
R287	0x011F33
R288	0x012008
R289	0x01210A
R290	0x012280
R291	0x012340
R292	0x012410
R293	0x012500
R294	0x012601
R295	0x012700
R296	0x012808
R297	0x01290A
R298	0x012A80
R299	0x012B40
R300	0x012C10
R301	0x012D00
R302	0x012E01
R303	0x012F00
R304	0x013002
R305	0x01310A
R306	0x013200
R307	0x013340
R308	0x013410
R309	0x013500
R310	0x013601
R311	0x013733
R312	0x013845
R313	0x013900
R314	0x013A08
R315	0x013B00
R316	0x013C00
R317	0x013D08
R318	0x013E03
R319	0x013F00
R320	0x0140F1
R321	0x014100
R322	0x014200
R323	0x014311
R324	0x014400
R325	0x014500
R326	0x014618
R327	0x014702
R328	0x014802
R329	0x014942
R330	0x014A03
R331	0x014B06
R332	0x014C00
R333	0x014D00
R334	0x014EC0
R335	0x014F7F
R336	0x015001
R337	0x015102
R338	0x015200
R339	0x015300
R340	0x015478
R341	0x015500
R342	0x015678
R343	0x015700
R344	0x015896
R345	0x015900
R346	0x015A78
R347	0x015BD4
R348	0x015C20
R349	0x015D00
R350	0x015E1E
R351	0x015F0B
R352	0x016000
R353	0x016101
R354	0x01624C
R355	0x016300
R356	0x016400
R357	0x01650C
R361	0x016958
R362	0x016A20
R363	0x016B00
R364	0x016C00
R365	0x016D00
R366	0x016E13
R371	0x017370
R375	0x017700
R386	0x018200
R387	0x018300
R358	0x016600
R359	0x016700
R360	0x01680C
R1365	0x055500

  • +1 in reply to new2day
    TI__Mastermind 33430 points

    Hi new2day,

    In your profile, I see a few things that may be preventing you from achieving SYSREF:

    • SYSREF_MUX is set to "Normal SYNC". I recommend setting to "Continuous SYSREF" for debugging.
    • SYNC_DISSYSREF=0. The SYSREF divider will be reset on every SYSREF rising edge, which will change the SYSREF frequency. Set SYNC_DISSYSREF=1.
    • SYNC_DISx=0 for all divider outputs. This will reset each CLKout divider on every SYSREF rising edge. I recommend setting SYNC_DISx=1 for all divider outputs.

    Regards,

    Derek Payne

  • 0 in reply to Derek Payne
    Expert 1940 points

    Hi Derek,

    I got SYSREF out. Thank you for your help. 

    I have another question about LMX2594.

    Was it must to have 100ohms termination on OSCin_P/N pins? 

    Thank you.

  • 0 in reply to new2day
    TI__Mastermind 33430 points

    Hi new2day,

    LMX2594 requires either 50Ω single-ended termination (for single-ended OSCin) with AC-coupling capacitor in series before the device pin, and unused pin connected to 0.1µF + 50Ω to GND in series; or 100Ω differential (for differential OSCin) with AC-coupling capacitors in series before both device pins. The OSCin configuration guidelines are given by the datasheet, section 8.1.1.

    Regards,

    Derek Payne